Invention Grant
US08241823B2 Method of fabrication of a semiconductor device having reduced pitch
有权
具有减小的间距的半导体器件的制造方法
- Patent Title: Method of fabrication of a semiconductor device having reduced pitch
- Patent Title (中): 具有减小的间距的半导体器件的制造方法
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Application No.: US13248932Application Date: 2011-09-29
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Publication No.: US08241823B2Publication Date: 2012-08-14
- Inventor: Ming-Feng Shieh , Shinn-Sheng Yu , Anthony Yen , Shao-Ming Yu , Chang-Yun Chang , Jeff J. Xu , Clement Hsingjen Wann
- Applicant: Ming-Feng Shieh , Shinn-Sheng Yu , Anthony Yen , Shao-Ming Yu , Chang-Yun Chang , Jeff J. Xu , Clement Hsingjen Wann
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: G03G5/00
- IPC: G03G5/00 ; H01L21/302 ; H01L21/461
Abstract:
Provided is a photolithography apparatus including a photomask. The photomask includes a pattern having a plurality of features, in an example, dummy line features. The pattern includes a first region being in the form of a localized on-grid array and a second region where at least one of the features has an increased width. The apparatus may include a second photomask which may define an active region. The feature with an increased width may be adjacent, and outside, the defined active region.
Public/Granted literature
- US20120021589A1 METHOD OF FABRICATION OF A SEMICONDUCTOR DEVICE HAVING REDUCED PITCH Public/Granted day:2012-01-26
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