发明授权
- 专利标题: Approach for reducing copper line resistivity
- 专利标题(中): 降低铜线电阻率的方法
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申请号: US11803282申请日: 2007-05-14
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公开(公告)号: US08242016B2公开(公告)日: 2012-08-14
- 发明人: Hsien-Ming Lee , Minghsing Tsai , Syun-Ming Jang
- 申请人: Hsien-Ming Lee , Minghsing Tsai , Syun-Ming Jang
- 申请人地址: TW Hsin-Chu
- 专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址: TW Hsin-Chu
- 代理机构: Slater & Matsil, L.L.P.
- 主分类号: H01L21/44
- IPC分类号: H01L21/44 ; H01L21/4763
摘要:
A method for fabricating an integrated circuit structure and the resulting integrated circuit structure are provided. The method includes forming a low-k dielectric layer; form an opening in the low-k dielectric layer; forming a barrier layer covering a bottom and sidewalls of the low-k dielectric layer; performing a treatment to the barrier layer in an environment comprising a treatment gas; and filling the opening with a conductive material, wherein the conductive material is on the barrier layer.
公开/授权文献
- US20080286965A1 Novel approach for reducing copper line resistivity 公开/授权日:2008-11-20
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