Invention Grant
- Patent Title: Fast settling, bit slicing comparator circuit
- Patent Title (中): 快速稳定,位片比较电路
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Application No.: US12589367Application Date: 2009-10-22
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Publication No.: US08242810B2Publication Date: 2012-08-14
- Inventor: Orest Fedan , Stephen Bourque
- Applicant: Orest Fedan , Stephen Bourque
- Applicant Address: US MA Canton
- Assignee: LoJack Operating Company, LP
- Current Assignee: LoJack Operating Company, LP
- Current Assignee Address: US MA Canton
- Agency: Goodwin Procter LLP
- Main IPC: H03K5/22
- IPC: H03K5/22 ; H03K5/153

Abstract:
An improved fast settling bit slicing comparator circuit includes a comparator having a non-inverting and inverting input; the non-inverting input receiving an input signal; a filter circuit for receiving the input signal and being connected with the inverting input of the comparator; a positive feedback circuit interconnected between the output of the comparator and the non-inverting input of the comparator for introducing a predetermined hysteresis offset; the filter circuit including a filter resistance and filter capacitance having a reduced time constant sufficient to compensate for at least a portion of the hysteresis offset. Additionally, the positive feedback circuit may be interconnected with the inverting input of the comparator through the filter circuit for gradually reducing the effect of the hysteresis offset by reducing the differential voltage between the inverting and non-inverting inputs.
Public/Granted literature
- US20110095790A1 Fast settling, bit slicing comparator circuit Public/Granted day:2011-04-28
Information query
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