Invention Grant
- Patent Title: N-FET with a highly doped source/drain and strain booster
- Patent Title (中): 具有高掺杂源/漏极和应变增强器的N-FET
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Application No.: US12341674Application Date: 2008-12-22
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Publication No.: US08247285B2Publication Date: 2012-08-21
- Inventor: Jing-Cheng Lin , Chen-Hua Yu
- Applicant: Jing-Cheng Lin , Chen-Hua Yu
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L21/8238
- IPC: H01L21/8238

Abstract:
A structure and method of making an N-FET with a highly doped source/drain and strain booster are presented. The method provides a substrate with a Ge channel region. A gate dielectric is formed over the Ge channel and a gate electrode is formed over the gate dielectric. Sacrificial gate spacers are disposed on the sidewalls of the gate dielectric and gate electrode. Cavities are etched into the substrate extending under the sacrificial gate spacers. Si1-xGex source/drain regions are doped in-situ during formation, x
Public/Granted literature
- US20100155790A1 N-FET with a Highly Doped Source/Drain and Strain Booster Public/Granted day:2010-06-24
Information query
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