Invention Grant
US08288233B2 Method to introduce uniaxial strain in multigate nanoscale transistors by self aligned SI to SIGE conversion processes and structures formed thereby
有权
通过自对准SI将SIGNA转换过程和结构形成的多晶纳米级晶体管中的单轴应变的方法
- Patent Title: Method to introduce uniaxial strain in multigate nanoscale transistors by self aligned SI to SIGE conversion processes and structures formed thereby
- Patent Title (中): 通过自对准SI将SIGNA转换过程和结构形成的多晶纳米级晶体管中的单轴应变的方法
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Application No.: US11864726Application Date: 2007-09-28
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Publication No.: US08288233B2Publication Date: 2012-10-16
- Inventor: Been-Yih Jin , Brian Doyle , Jack Kavalieros , Suman Datta
- Applicant: Been-Yih Jin , Brian Doyle , Jack Kavalieros , Suman Datta
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Forefront IP Lawgroup, PLLC
- Main IPC: H01L21/8244
- IPC: H01L21/8244

Abstract:
Methods of forming a microelectronic structure are described. Embodiments of those methods may include providing a gate electrode comprising a top surface and first and second laterally opposite sidewalls, wherein a hard mask is disposed on the top surface, a source drain region disposed on opposite sides of the gate electrode, and a spacer disposed on the first and second laterally opposed sidewalls of the gate electrode, forming a silicon germanium layer on exposed portions of the top surface and the first and second laterally opposite sidewalls of the source drain region and then oxidizing a portion of the silicon germanium layer, wherein a germanium portion of the silicon germanium layer is forced down into the source drain region to convert a silicon portion of the source drain region into a silicon germanium portion of the source drain region.
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