Invention Grant
US08302068B2 Leakage aware design post-processing 有权
泄漏感知设计后处理

Leakage aware design post-processing
Abstract:
The present invention provides a method and computer program product for designing an on-wafer target for use by a model-based design tool such as OPC or OPC verification. The on-wafer target is modified by modifying a critical dimension so as to improve or optimize an electrical characteristic, while also ensuring that one or more yield constraints are satisfied. The use of an electrically optimized target can result in cost-effective mask designs that better meet the designers' intent.
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