发明授权
US08304349B2 Method to integrate gate etching as all-in-one process for high K metal gate
有权
将栅极蚀刻集成为高K金属栅极的一体化工艺的方法
- 专利标题: Method to integrate gate etching as all-in-one process for high K metal gate
- 专利标题(中): 将栅极蚀刻集成为高K金属栅极的一体化工艺的方法
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申请号: US12367399申请日: 2009-02-06
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公开(公告)号: US08304349B2公开(公告)日: 2012-11-06
- 发明人: Jr Jung Lin , Yih-Ann Lin , Ryan Chia-Jen Chen
- 申请人: Jr Jung Lin , Yih-Ann Lin , Ryan Chia-Jen Chen
- 申请人地址: TW Hsin-Chu
- 专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址: TW Hsin-Chu
- 代理机构: Haynes and Boone, LLP
- 主分类号: H01L21/302
- IPC分类号: H01L21/302
摘要:
The present disclosure provides a method for making metal gate stacks of a semiconductor device. The method includes applying a first dry etching process to a semiconductor substrate in an etch chamber through openings of a patterned mask layer defining gate regions, removing a polysilicon layer and a metal gate layer on the semiconductor substrate; applying a H2O steam to the semiconductor substrate in the etch chamber, removing a capping layer on the semiconductor substrate; applying a second dry etching process to the semiconductor substrate in the etch chamber, removing a high k dielectric material layer; and applying a wet etching process to the semiconductor substrate to remove polymeric residue.
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