Invention Grant
- Patent Title: Array substrate
- Patent Title (中): 阵列基片
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Application No.: US13439092Application Date: 2012-04-04
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Publication No.: US08304782B2Publication Date: 2012-11-06
- Inventor: Hsiang-Lin Lin , Ching-Huan Lin , Chih-Hung Shih , Wei-Ming Huang
- Applicant: Hsiang-Lin Lin , Ching-Huan Lin , Chih-Hung Shih , Wei-Ming Huang
- Applicant Address: TW Hsinchu
- Assignee: Au Optronics Corp.
- Current Assignee: Au Optronics Corp.
- Current Assignee Address: TW Hsinchu
- Agency: McClure, Qualey & Rodack LLP
- Priority: TW98117413A 20090526
- Main IPC: H01L29/04
- IPC: H01L29/04 ; H01L31/036

Abstract:
An array substrate and method for manufacturing the same is provided, wherein a data line is composed of first and second segments connected by a contact pad. First and second insulation layers are disposed between the first segment of the data line and a shielding electrode. In addition, the first insulation layer is disposed between the second segment of the data line and a gate line in their overlapping area. Accordingly, the coupling effect between the conductive layers can be reduced. For example, the RC delay problem due to parasitic capacitance between the shielding electrode and the data line is solved. As a result of the design of the two insulator layers between the first segment of the data line and the shielding electrode, the shorting between the conductive layers can also be simultaneously solved and the product yield can be increased.
Public/Granted literature
- US20120193629A1 ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME Public/Granted day:2012-08-02
Information query
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