公开(公告)号：US08304782B2

公开(公告)日：2012-11-06

申请号：US13439092

申请日：2012-04-04

申请人： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang

发明人： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang

IPC分类号： H01L29/04 ,  H01L31/036

CPC分类号： H01L27/124

摘要： An array substrate and method for manufacturing the same is provided, wherein a data line is composed of first and second segments connected by a contact pad. First and second insulation layers are disposed between the first segment of the data line and a shielding electrode. In addition, the first insulation layer is disposed between the second segment of the data line and a gate line in their overlapping area. Accordingly, the coupling effect between the conductive layers can be reduced. For example, the RC delay problem due to parasitic capacitance between the shielding electrode and the data line is solved. As a result of the design of the two insulator layers between the first segment of the data line and the shielding electrode, the shorting between the conductive layers can also be simultaneously solved and the product yield can be increased.

摘要翻译： 提供阵列基板及其制造方法，其中数据线由通过接触焊盘连接的第一和第二部分组成。 第一和第二绝缘层设置在数据线的第一段和屏蔽电极之间。 此外，第一绝缘层设置在数据线的第二段和其重叠区域中的栅极线之间。 因此，可以降低导电层之间的耦合效应。 例如，解决了由于屏蔽电极和数据线之间的寄生电容引起的RC延迟问题。 作为数据线的第一段与屏蔽电极之间的两个绝缘体层的设计的结果，导电层之间的短路也可以同时解决，并且可以提高产品的产率。

公开(公告)号：US08179490B2

公开(公告)日：2012-05-15

申请号：US12483390

申请日：2009-06-12

申请人： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang

发明人： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang

IPC分类号： G02F1/136

CPC分类号： G02F1/136213 ,  G02F1/136209 ,  G02F1/136286 ,  G02F2001/13606 ,  G02F2201/40 ,  H01L27/124 ,  H01L27/1255

摘要： This invention in one aspect relates to a pixel structure. In one embodiment, the pixel structure includes a scan line formed on a substrate and a data line formed over the substrate defining a pixel area, a switch formed inside the pixel area on the substrate, a shielding electrode having a first portion and a second portion extending from the first portion, and formed over the scan line, the data line and the switch, where the first portion is overlapped with the switch and the second portion is overlapped with the data line, and a pixel electrode having a first portion and a second portion extending from the first portion, and formed over the shielding electrode in the pixel area, where the first portion is overlapped with the first portion of the shielding electrode so as to define a storage capacitor therebetween and the second portion has no overlapping with the second portion of the shielding electrode.

摘要翻译： 本发明在一个方面涉及像素结构。 在一个实施例中，像素结构包括形成在衬底上的扫描线和形成在衬底上的限定像素区域的数据线，形成在衬底上的像素区域内的开关，具有第一部分和第二部分的屏蔽电极 从第一部分延伸并且在扫描线上形成数据线和开关，其中第一部分与开关重叠，并且第二部分与数据线重叠，并且具有第一部分和第二部分的像素电极 第二部分从第一部分延伸并且形成在像素区域中的屏蔽电极之上，其中第一部分与屏蔽电极的第一部分重叠，以便在其间限定存储电容器，并且第二部分与第二部分不重叠 屏蔽电极的第二部分。

公开(公告)号：US08471973B2

公开(公告)日：2013-06-25

申请号：US12788876

申请日：2010-05-27

申请人： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang ,  Chih-Hung Lin ,  Yu-Cheng Chen ,  Yi-Hui Li ,  Tsan-Chun Wang

发明人： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang ,  Chih-Hung Lin ,  Yu-Cheng Chen ,  Yi-Hui Li ,  Tsan-Chun Wang

IPC分类号： G02F1/36

CPC分类号： G02F1/136209 ,  G02F1/136213 ,  G02F2001/13606 ,  G02F2201/40 ,  H01L27/1248 ,  H01L27/1255

摘要： This invention in one aspect relates to a pixel structure. In one embodiment, the pixel structure includes a scan line formed on a substrate and a data line formed over the substrate defining a pixel area, a switch formed inside the pixel area on the substrate, a shielding electrode formed over the switch, a plane organic layer formed over the date line and the pixel area and having no overlapping with the shielding electrode, and a pixel electrode having a first portion and a second portion extending from the first portion, and formed over the shielding electrode and the plane organic layer in the pixel area, wherein the first portion is overlapped with the shielding electrode so as to define a storage capacitor therebetween, and the second portion overlays the plane organic layer and has no overlapping with the data line.

摘要翻译： 本发明在一个方面涉及像素结构。 在一个实施例中，像素结构包括形成在衬底上的扫描线和形成在限定像素区域的衬底上的数据线，形成在衬底上的像素区域内的开关，形成在开关上的屏蔽电极，有机平面 形成在日期线和像素区域上并且与屏蔽电极不重叠的像素电极，以及具有从第一部分延伸的第一部分和第二部分的像素电极，并且形成在屏蔽电极和平面有机层的上方 像素区域，其中第一部分与屏蔽电极重叠以便在其间限定存储电容器，并且第二部分覆盖平面有机层并且不与数据线重叠。

公开(公告)号：US20100315569A1

公开(公告)日：2010-12-16

申请号：US12483390

申请日：2009-06-12

申请人： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang

发明人： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang

IPC分类号： G02F1/1368 ,  H01L21/28

CPC分类号： G02F1/136213 ,  G02F1/136209 ,  G02F1/136286 ,  G02F2001/13606 ,  G02F2201/40 ,  H01L27/124 ,  H01L27/1255

摘要： This invention in one aspect relates to a pixel structure. In one embodiment, the pixel structure includes a scan line formed on a substrate and a data line formed over the substrate defining a pixel area, a switch formed inside the pixel area on the substrate, a shielding electrode having a first portion and a second portion extending from the first portion, and formed over the scan line, the data line and the switch, where the first portion is overlapped with the switch and the second portion is overlapped with the data line, and a pixel electrode having a first portion and a second portion extending from the first portion, and formed over the shielding electrode in the pixel area, where the first portion is overlapped with the first portion of the shielding electrode so as to define a storage capacitor therebetween and the second portion has no overlapping with the second portion of the shielding electrode.

摘要翻译： 本发明在一个方面涉及像素结构。 在一个实施例中，像素结构包括形成在衬底上的扫描线和形成在衬底上的限定像素区域的数据线，形成在衬底上的像素区域内的开关，具有第一部分和第二部分的屏蔽电极 从第一部分延伸并且在扫描线上形成数据线和开关，其中第一部分与开关重叠，并且第二部分与数据线重叠，并且具有第一部分和第二部分的像素电极 第二部分从第一部分延伸并且形成在像素区域中的屏蔽电极之上，其中第一部分与屏蔽电极的第一部分重叠，以便在其间限定存储电容器，并且第二部分与第二部分不重叠 屏蔽电极的第二部分。

公开(公告)号：US20100301345A1

公开(公告)日：2010-12-02

申请号：US12623497

申请日：2009-11-23

申请人： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang

发明人： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang

IPC分类号： H01L27/06 ,  H01L21/8234

CPC分类号： H01L27/124

摘要： An array substrate and method for manufacturing the same is provided, wherein a data line is composed of first and second segments connected by a contact pad. First and second insulation layers are disposed between the first segment of the data line and a shielding electrode. In addition, the first insulation layer is disposed between the second segment of the data line and a gate line in their overlapping area. Accordingly, the coupling effect between the conductive layers can be reduced. For example, the RC delay problem due to parasitic capacitance between the shielding electrode and the data line is solved. As a result of the design of the two insulator layers between the first segment of the data line and the shielding electrode, the shorting between the conductive layers can also be simultaneously solved and the product yield can be increased.

摘要翻译： 提供阵列基板及其制造方法，其中数据线由通过接触焊盘连接的第一和第二部分组成。 第一和第二绝缘层设置在数据线的第一段和屏蔽电极之间。 此外，第一绝缘层设置在数据线的第二段和其重叠区域中的栅极线之间。 因此，可以降低导电层之间的耦合效应。 例如，解决了由于屏蔽电极和数据线之间的寄生电容引起的RC延迟问题。 作为数据线的第一段与屏蔽电极之间的两个绝缘体层的设计的结果，导电层之间的短路也可以同时解决，并且可以提高产品的产率。

公开(公告)号：US08361821B2

公开(公告)日：2013-01-29

申请号：US13443672

申请日：2012-04-10

申请人： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang

发明人： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang

IPC分类号： H01L21/00 ,  H01L21/84 ,  H01L21/336 ,  G02F1/136 ,  G02F1/1343

CPC分类号： G02F1/136213 ,  G02F1/136209 ,  G02F1/136286 ,  G02F2001/13606 ,  G02F2201/40 ,  H01L27/124 ,  H01L27/1255

摘要： In one aspect of this invention, a pixel structure includes a scan line formed on a substrate and a data line formed over the substrate defining a pixel area, a switch formed inside the pixel area on the substrate, a shielding electrode having a first portion and a second portion extending from the first portion, and formed over the scan line, the data line and the switch, where the first portion is overlapped with the switch and the second portion is overlapped with the data line, and a pixel electrode having a first portion and a second portion extending from the first portion, and formed over the shielding electrode in the pixel area, where the first portion is overlapped with the first portion of the shielding electrode so as to define a storage capacitor therebetween and the second portion has no overlapping with the second portion of the shielding electrode.

摘要翻译： 在本发明的一个方面，像素结构包括形成在基板上的扫描线和形成在限定像素区域的基板上的数据线，形成在基板上的像素区域内的开关，具有第一部分的屏蔽电极， 从第一部分延伸并形成在扫描线上的第二部分，数据线和开关，其中第一部分与开关重叠，第二部分与数据线重叠;以及像素电极，具有第一部分 部分和从第一部分延伸的第二部分，并且形成在像素区域中的屏蔽电极之上，其中第一部分与屏蔽电极的第一部分重叠，以便在其间限定存储电容器，并且第二部分没有 与屏蔽电极的第二部分重叠。

公开(公告)号：US08173498B2

公开(公告)日：2012-05-08

申请号：US12623497

申请日：2009-11-23

申请人： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang

发明人： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang

IPC分类号： H01L21/00 ,  H01L21/84

CPC分类号： H01L27/124

摘要： A method for manufacturing an array substrate is provided, wherein a data line is composed of first and second segments connected by a contact pad. First and second insulation layers are disposed between the first segment of the data line and a shielding electrode. In addition, the first insulation layer is disposed between the second segment of the data line and a gate line in their overlapping area. Accordingly, the coupling effect between the conductive layers can be reduced. For example, the RC delay problem due to parasitic capacitance between the shielding electrode and the data line is solved. As a result of the design of the two insulator layers between the first segment of the data line and the shielding electrode, the shorting between the conductive layers can also be simultaneously solved and the product yield can be increased.

摘要翻译： 提供一种阵列基板的制造方法，其中数据线由通过接触焊盘连接的第一和第二段构成。 第一和第二绝缘层设置在数据线的第一段和屏蔽电极之间。 此外，第一绝缘层设置在数据线的第二段和其重叠区域中的栅极线之间。 因此，可以降低导电层之间的耦合效应。 例如，解决了由于屏蔽电极和数据线之间的寄生电容引起的RC延迟问题。 作为数据线的第一段与屏蔽电极之间的两个绝缘体层的设计的结果，导电层之间的短路也可以同时解决，并且可以提高产品的产率。

公开(公告)号：US20100315583A1

公开(公告)日：2010-12-16

申请号：US12788876

申请日：2010-05-27

申请人： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang ,  Chih-Hung Lin ,  Yu-Cheng Chen ,  Yi-Hui Li ,  Tsan-Chun Wang

发明人： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang ,  Chih-Hung Lin ,  Yu-Cheng Chen ,  Yi-Hui Li ,  Tsan-Chun Wang

IPC分类号： G02F1/1343 ,  H01L21/84

CPC分类号： G02F1/136209 ,  G02F1/136213 ,  G02F2001/13606 ,  G02F2201/40 ,  H01L27/1248 ,  H01L27/1255

摘要： This invention in one aspect relates to a pixel structure. In one embodiment, the pixel structure includes a scan line formed on a substrate and a data line formed over the substrate defining a pixel area, a switch formed inside the pixel area on the substrate, a shielding electrode formed over the switch, a plane organic layer formed over the date line and the pixel area and having no overlapping with the shielding electrode, and a pixel electrode having a first portion and a second portion extending from the first portion, and formed over the shielding electrode and the plane organic layer in the pixel area, wherein the first portion is overlapped with the shielding electrode so as to define a storage capacitor therebetween, and the second portion overlays the plane organic layer and has no overlapping with the data line.

摘要翻译： 本发明在一个方面涉及像素结构。 在一个实施例中，像素结构包括形成在衬底上的扫描线和形成在限定像素区域的衬底上的数据线，形成在衬底上的像素区域内的开关，形成在开关上的屏蔽电极，有机平面 形成在日期线和像素区域上并且与屏蔽电极不重叠的像素电极，以及具有从第一部分延伸的第一部分和第二部分的像素电极，并且形成在屏蔽电极和平面有机层的上方 像素区域，其中第一部分与屏蔽电极重叠以便在其间限定存储电容器，并且第二部分覆盖平面有机层并且不与数据线重叠。

公开(公告)号：US08149228B2

公开(公告)日：2012-04-03

申请号：US11308644

申请日：2006-04-17

申请人： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Kuo-Yu Huang

发明人： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Kuo-Yu Huang

IPC分类号： G06F3/033

CPC分类号： G02F1/134336 ,  G02F2001/134345 ,  G02F2201/52

摘要： An active matrix substrate including a substrate, a plurality of scan lines, a plurality of data lines and a plurality of sub-pixels is provided. The scan lines and the data lines are disposed on the substrate, and define a plurality of sub-pixel regions distributed in a delta arrangement. The sub-pixels corresponding to the sub-pixel regions are disposed on the substrate. The sub-pixels are electrically connected with corresponding scan lines and corresponding data lines. Between two sub-pixel regions corresponding to any two adjacent sub-pixels at a same side of one scan line, there are two data lines. Each sub-pixel includes an active device and a pixel electrode. The active device is electrically connected with a corresponding scan line and a corresponding data line. The pixel electrode is electrically connected with the active device, and extends from the sub-pixel region corresponding to the sub-pixel to a position over the data line.

摘要翻译： 提供了包括基板，多条扫描线，多条数据线和多个子像素的有源矩阵基板。 扫描线和数据线设置在基板上，并且限定以三角形排列分布的多个子像素区域。 对应于子像素区域的子像素设置在基板上。 子像素与相应的扫描线和对应的数据线电连接。 在与一条扫描线同侧的任意两个相邻子像素对应的两个子像素区域之间，存在两条数据线。 每个子像素包括有源器件和像素电极。 有源器件与相应的扫描线和相应的数据线电连接。 像素电极与有源器件电连接，并且从对应于子像素的子像素区域延伸到数据线上方的位置。

公开(公告)号：US07751002B2

公开(公告)日：2010-07-06

申请号：US12190601

申请日：2008-08-13

申请人： Shih-Chia Hsu ,  Ying-Ru Chen ,  Hsiang-Lin Lin ,  Ching-Huan Lin

发明人： Shih-Chia Hsu ,  Ying-Ru Chen ,  Hsiang-Lin Lin ,  Ching-Huan Lin

IPC分类号： G02F1/1335

CPC分类号： G02F1/133555 ,  G02F1/136213 ,  G02F1/136286

摘要： A pixel structure of a transflective LCD panel includes a substrate, a data line and a scan, a thin film transistor containing an extending electrode, a first common electrode and a second common electrode, a transmissive pixel electrode, and a reflective pixel electrode forming a first coupling capacitor with the extending electrode and a second coupling capacitor with the second common electrode. The first and second common electrodes and the data line overlap with each other in an overlapping area, wherein the first common electrode is disposed between the second common electrode and the data line.

摘要翻译： 半透射型LCD面板的像素结构包括基板，数据线和扫描，包含延伸电极的薄膜晶体管，第一公共电极和第二公共电极，透射像素电极和反射像素电极，形成 第一耦合电容器与延伸电极和第二耦合电容器与第二公共电极。 第一和第二公共电极和数据线在重叠区域彼此重叠，其中第一公共电极设置在第二公共电极和数据线之间。