发明授权
- 专利标题: Multi-chip stacked package and its mother chip to save interposer
- 专利标题(中): 多芯片堆叠封装及其母芯片保存插件
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申请号: US12630658申请日: 2009-12-03
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公开(公告)号: US08304917B2公开(公告)日: 2012-11-06
- 发明人: Wen-Jeng Fan , Li-Chih Fang , Ronald Takaoiwata
- 申请人: Wen-Jeng Fan , Li-Chih Fang , Ronald Takaoiwata
- 申请人地址: TW Hukou Shiang, Hsinchu
- 专利权人: Powertech Technology Inc.
- 当前专利权人: Powertech Technology Inc.
- 当前专利权人地址: TW Hukou Shiang, Hsinchu
- 代理机构: Muncy, Geissler, Olds & Lowe, PLLC
- 主分类号: H01L23/528
- IPC分类号: H01L23/528
摘要:
A multi-chip stacked package and its mother chip to save an interposer are revealed. The mother chip is a two-layer structure consisting of a semiconductor layer and an organic layer where a redistribution layer is embedded into the organic layer with a plurality of first terminals and a plurality of second terminals disposed on the redistribution layer and exposed from the organic layer. The mother chip is flip-chip mounted on the substrate. The active surface of the daughter chip is in contact with the organic layer with the bonding pads of the daughter chip bonded to the first terminals. Furthermore, a plurality of electrically connecting components electrically connect the second terminals to the substrate. In the multi-chip stacked package, the interposer can be eliminated with a thinner overall package thickness as well as controlled package warpage.
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