发明授权
US08305795B2 Nonvolatile variable resistance memory element writing method, and nonvolatile variable resistance memory device
有权
非易失性可变电阻存储元件写入方法和非易失性可变电阻存储器件
- 专利标题: Nonvolatile variable resistance memory element writing method, and nonvolatile variable resistance memory device
- 专利标题(中): 非易失性可变电阻存储元件写入方法和非易失性可变电阻存储器件
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申请号: US12999019申请日: 2010-04-27
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公开(公告)号: US08305795B2公开(公告)日: 2012-11-06
- 发明人: Ryotaro Azuma , Kazuhiko Shimakawa , Shunsaku Muraoka , Ken Kawai
- 申请人: Ryotaro Azuma , Kazuhiko Shimakawa , Shunsaku Muraoka , Ken Kawai
- 申请人地址: JP Osaka
- 专利权人: Panasonic Corporation
- 当前专利权人: Panasonic Corporation
- 当前专利权人地址: JP Osaka
- 代理机构: Wenderoth, Lind & Ponack, LLP
- 优先权: JP2009-108528 20090427; JP2009-108555 20090427
- 国际申请: PCT/JP2010/003015 WO 20100427
- 国际公布: WO2010/125805 WO 20101104
- 主分类号: G11C11/00
- IPC分类号: G11C11/00
摘要:
To provide a variable resistance element writing method that, even when a variable resistance element has a possibility of becoming a half LR state, can ensure a maximum resistance change window by correcting the variable resistance element to a normal low resistance state. In a method of writing data to a variable resistance element (10a) that reversibly changes between a high resistance state and a low resistance state according to a polarity of an applied voltage, as a voltage applied to an upper electrode (11) with respect to a lower electrode (14t): a positive voltage is applied in a high resistance writing step (405) to set the variable resistance element (10a) to a high resistance state (401); a negative voltage is applied in a low resistance writing step (406, 408) to set the variable resistance element (10a) to a low resistance state (403, 402); and a positive voltage is applied in a low resistance stabilization writing step (404) after the negative voltage is applied in the low resistance writing step (408), thereby setting the variable resistance element (10a) through the low resistance state to the high resistance state (401).
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