Invention Grant
US08338267B2 Systems and methods for vertically integrating semiconductor devices
失效
用于垂直集成半导体器件的系统和方法
- Patent Title: Systems and methods for vertically integrating semiconductor devices
- Patent Title (中): 用于垂直集成半导体器件的系统和方法
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Application No.: US11776069Application Date: 2007-07-11
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Publication No.: US08338267B2Publication Date: 2012-12-25
- Inventor: Larry Smith
- Applicant: Larry Smith
- Applicant Address: US TX Austin
- Assignee: Sematech, Inc.
- Current Assignee: Sematech, Inc.
- Current Assignee Address: US TX Austin
- Agency: Fulbright & Jaworski L.L.P.
- Main IPC: H01L21/762
- IPC: H01L21/762

Abstract:
Systems and methods for vertically integrating semiconductor devices are described. In one embodiment, a method comprises providing an interposer, aligning and bonding a plurality of die to a first surface of the interposer, aligning and bonding a backplate to the plurality of die, and reducing at least one portion of the interposer to create a reconstituted wafer. In another embodiment, an apparatus comprises an interposer operable to receive at least one donor semiconductor device disposed on a first surface of the interposer and aligned therewith, and at least one host semiconductor device disposed on a second surface of the interposer and aligned therewith; where the interposer allows the at least one donor and host semiconductor devices to become vertically integrated.
Public/Granted literature
- US20090017580A1 SYSTEMS AND METHODS FOR VERTICALLY INTEGRATING SEMICONDUCTOR DEVICES Public/Granted day:2009-01-15
Information query
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