发明授权
- 专利标题： Multi-gate III-V quantum well structures
- 专利标题（中）： 多栅III-V量子阱结构
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申请号： US12655463申请日： 2009-12-30
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公开(公告)号： US08344425B2公开(公告)日： 2013-01-01
- 发明人: Marko Radosavljevic , Uday Shah , Gilbert Dewey , Niloy Mukherjee , Robert S. Chau , Jack Kavalieros , Ravi Pillarisetty , Titash Rakshit , Matthew V. Metz
- 申请人： Marko Radosavljevic , Uday Shah , Gilbert Dewey , Niloy Mukherjee , Robert S. Chau , Jack Kavalieros , Ravi Pillarisetty , Titash Rakshit , Matthew V. Metz
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 代理机构： Forefront IP Lawgroup, PLLC
- 主分类号： H01L29/12
- IPC分类号： H01L29/12 ; H01L21/20 ; H01L21/336 ; H01L21/18
摘要：
Methods of forming microelectronic structures are described. Embodiments of those methods include forming a III-V tri-gate fin on a substrate, forming a cladding material around the III-V tri-gate fin, and forming a hi k gate dielectric around the cladding material.
公开/授权文献
- US20110156004A1 Multi-gate III-V quantum well structures 公开/授权日：2011-06-30