Invention Grant
- Patent Title: Wirebonded semiconductor package
- Patent Title (中): 接线半导体封装
-
Application No.: US12686979Application Date: 2010-01-13
-
Publication No.: US08357998B2Publication Date: 2013-01-22
- Inventor: Wen Pin Huang , Cheng Tsung Hsu , Cheng Lan Tseng , Chih Cheng Hung , Yu Chi Chen
- Applicant: Wen Pin Huang , Cheng Tsung Hsu , Cheng Lan Tseng , Chih Cheng Hung , Yu Chi Chen
- Applicant Address: TW Kaohsiung
- Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee Address: TW Kaohsiung
- Agency: Foley & Lardner LLP
- Priority: TW98121318A 20090625
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/495 ; H01L21/50
Abstract:
In a method of manufacturing a semiconductor package including a wire binding process, a first end of the bonding wire is bonded to a first pad so as to form a first bond portion. A second end of the bonding wire is bonded to a second pad, wherein an interface surface between the bonding wire and the second pad has a first connecting area. The bonded second end of the bonding wire is scrubbed so as to form a second bond portion, wherein a new interface surface between the bonding wire and the second pad has a second connecting area larger than the first connecting area. A remainder of the bonding wire is separated from the second bond portion.
Public/Granted literature
- US20100200969A1 SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2010-08-12
Information query
IPC分类:
