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US08359503B2 Method and system for generating an integrated circuit chip facility waveform from a series of chip snapshots 失效
从一系列芯片快照生成集成电路芯片设备波形的方法和系统

Method and system for generating an integrated circuit chip facility waveform from a series of chip snapshots
摘要：
Methods and corresponding test systems for generating a chip facility waveform from a series of chip snapshots. The methods including, (i) testing an integrated chip multiple times, each time increasing a clockstop delay delaying a clockstop generated by triggered error condition each time determining the state of state holding elements of the integrated circuit and (ii) testing an integrated circuit chip one time to generate a error condition and determining multiple times the states of state holding elements of the integrated circuit based on previous states of the state holding elements.
摘要（中）：

用于从一系列芯片快照生成芯片设施波形的方法和相应的测试系统。 所述方法包括：（i）多次测试集成芯片，每次每次确定集成电路的状态保持元件的状态时，增加延迟由触发错误状态产生的时钟脉冲的时钟延迟，以及（ii）测试集成电路芯片 一次基于状态保持元件的先前状态产生误差条件并确定多次集成电路的状态保持元件的状态。

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