Circuit architecture for the parallel supplying during electric or electromagnetic testing of a plurality of electronic devices integrated on a semiconductor wafer

Invention Grant

US08378346B2 Circuit architecture for the parallel supplying during electric or electromagnetic testing of a plurality of electronic devices integrated on a semiconductor wafer 有权

Title translation: 用于在集成在半导体晶片上的多个电子设备的电或电磁测试期间并联供电的电路架构

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Patent Title: Circuit architecture for the parallel supplying during electric or electromagnetic testing of a plurality of electronic devices integrated on a semiconductor wafer
Patent Title (中): 用于在集成在半导体晶片上的多个电子设备的电或电磁测试期间并联供电的电路架构
Application No.: US13022419

Application Date: 2011-02-07
Publication No.: US08378346B2

Publication Date: 2013-02-19
Inventor: Alberto Pagani
Applicant: Alberto Pagani
Applicant Address: IT Agrate Brianza
Assignee: STMicroelectronics S.r.l.
Current Assignee: STMicroelectronics S.r.l.
Current Assignee Address: IT Agrate Brianza
Agency: Seed IP Law Group PLLC
Priority: ITMI2008A1492 20080807
Main IPC: H01L23/58
IPC: H01L23/58

Circuit architecture for the parallel supplying during electric or electromagnetic testing of a plurality of electronic devices integrated on a semiconductor wafer

Abstract:

A circuit architecture provides for the parallel supplying of power during electric or electromagnetic testing of electronic devices integrated on a same semiconductor wafer and bounded by scribe lines. The circuit architecture comprises a conductive grid interconnecting the electronic devices and having a portion external to the devices and a portion internal to the devices. The external portion extends along the scribe lines; and the internal portion extends within at least a part of the devices. The circuit architecture includes interconnection pads between the external portion and the internal portion of the conductive grid and provided on at least a part of the devices, the interconnection pads forming, along with the internal and external portions, power supply lines which are common to different electronic devices of the group.

Abstract(Chinese):

电路架构提供了在同一半导体晶片上并且由划线界定的电子设备的电或电磁测试期间并联供电。电路架构包括将电子设备互连并且具有设备外部的部分和设备内部的部分的导电栅格。外部部分沿划线延伸; 并且内部部分在装置的至少一部分内延伸。电路结构包括在导电栅格的外部部分和内部部分之间并且设置在至少一部分器件上的互连焊盘，互连焊盘与内部和外部部分形成不同的电源线电子设备组。

Public/Granted literature

US20110186838A1 CIRCUIT ARCHITECTURE FOR THE PARALLEL SUPPLYING DURING AN ELECTRIC OR ELECTROMAGNETIC TESTING OF A PLURALITY OF ELECTRONIC DEVICES INTEGRATED ON A SEMICONDUCTOR WAFER Public/Granted day:2011-08-04

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L23/00	半导体或其他固态器件的零部件（H01L25/00优先）
H01L23/58	.其他组不包含的，用于半导体器件的电结构装置