Shallow trench isolation regions are disposed in an n-type silicon semiconductor layer laterally adjacent to a collection region of a photodetector and laterally adjacent to a charge-to-voltage conversion region. The shallow trench isolation regions each include a trench disposed in the silicon semiconductor layer and a first dielectric structure disposed along an interior bottom and sidewalls of each trench. A second dielectric structure is disposed over the pinning layer. The dielectric structures include a silicon nitride layer disposed over an oxide layer. An n-type isolation layer is disposed along only a portion of the exterior bottom of the trench and the exterior sidewall of the trench immediately adjacent to the photodetector. The n-type isolation layer is not disposed along the remaining portion of the bottom or the opposing exterior sidewall of the trench.