发明授权
- 专利标题: Wafer unit for testing semiconductor chips and test system
- 专利标题(中): 晶圆单元用于测试半导体芯片和测试系统
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申请号: US12953362申请日: 2010-11-23
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公开(公告)号: US08378700B2公开(公告)日: 2013-02-19
- 发明人: Daisuke Watanabe , Toshiyuki Okayasu
- 申请人: Daisuke Watanabe , Toshiyuki Okayasu
- 申请人地址: JP Tokyo
- 专利权人: Advantest Corporation
- 当前专利权人: Advantest Corporation
- 当前专利权人地址: JP Tokyo
- 主分类号: G01R31/20
- IPC分类号: G01R31/20
摘要:
Provided is a test wafer unit for testing a plurality of semiconductor chips formed on a semiconductor wafer, the test wafer unit including: a test wafer having a shape corresponding to a shape of the semiconductor wafer; and a plurality of test circuits formed on the test wafer, each test circuit provided to correspond to two or more of the plurality of semiconductor chips and testing the two or more semiconductor chips. The test wafer unit may include a plurality of connection terminals formed on the test wafer in one to one relation with test terminals of the plurality of semiconductor chips, where each of the plurality of connection terminals is connected to a corresponding one of the test terminals.
公开/授权文献
- US20110234252A1 WAFER UNIT FOR TESTING AND TEST SYSTEM 公开/授权日:2011-09-29