Invention Grant
- Patent Title: Method of fabricating an integrated circuit package
- Patent Title (中): 制造集成电路封装的方法
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Application No.: US13009949Application Date: 2011-01-20
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Publication No.: US08383462B2Publication Date: 2013-02-26
- Inventor: Emmanuel Loiselet
- Applicant: Emmanuel Loiselet
- Applicant Address: GB Surrey
- Assignee: Thales Holdings UK PLC
- Current Assignee: Thales Holdings UK PLC
- Current Assignee Address: GB Surrey
- Agency: Stroock & Stroock & Lavan LLP
- Priority: GB1001341.5 20100127
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L23/12

Abstract:
A method of manufacturing a ball grid array, BGA, integrated circuit package, comprising forming a double sided printed circuit board, PCB, with blind vias interconnecting electrically the circuits on the opposed surfaces of the PCB, with at least one through-hole to allow fluid or gas to pass through the PCB, and an integrated circuit connected to the printed circuit on one side of the PCB; soldering a lid onto the said one side of the PCB to enclose the integrated circuit, whilst allowing thermally expanding gas or fluid to escape through the or each through-hole, whereby to form a package which is hermetically sealed except for the or each through-hole, and which has a cavity between the integrated circuit and the lid; applying a BGA to the side of the PCB opposed to the said one side, whereby to solder the balls of the BGA to respective portions of the printed circuit and to align one of the balls axially with each through-hole; and soldering the ball or balls into the through-hole, or into each respective through-hole, to hermetically seal the package.
Public/Granted literature
- US20110180921A1 INTEGRATED CIRCUIT PACKAGE Public/Granted day:2011-07-28
Information query
IPC分类: