- 专利标题: Test pad structure, a pad structure for inspecting a semiconductor chip and a wiring subtrate for a tape package having the same
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申请号: US12457775申请日: 2009-06-22
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公开(公告)号: US08384407B2公开(公告)日: 2013-02-26
- 发明人: So-Young Lim , Sang-Heul Lee
- 申请人: So-Young Lim , Sang-Heul Lee
- 申请人地址: KR Gyeonggi-do
- 专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人地址: KR Gyeonggi-do
- 代理机构: Harness, Dickey & Pierce, P.L.C.
- 优先权: KR10-2008-0060345 20080625
- 主分类号: G01R31/26
- IPC分类号: G01R31/26 ; G01R31/02
摘要:
A test pad structure may include a plurality of test pads and a plurality of connection leads. A plurality of the test pads may be sequentially arranged from a wiring pattern on a substrate and arranged in rows parallel with one another. The plurality of the test pads may include a first group of test pads having at least one pad arranged in a first row and a second group of test pads having at least two pads. A plurality of the connection leads may extend from end portions of the wiring pattern to be connected to the plurality of test pads. A plurality of the connection leads may include at least one inner lead passing between the at least two pads of the second group of the test pads arranged in a second row closest to the first group of the test pads. The at least one inner lead may be connected to at least one pad of the at least two pads of the second group of the test pads arranged in a third row next to the second row.
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