Invention Grant
- Patent Title: Method of programming nonvolatile memory element
- Patent Title (中): 非易失性存储元件编程方法
-
Application No.: US13001840Application Date: 2010-04-09
-
Publication No.: US08391051B2Publication Date: 2013-03-05
- Inventor: Yoshihiko Kanzawa , Takeshi Takagi
- Applicant: Yoshihiko Kanzawa , Takeshi Takagi
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: Wenderoth, Lind & Ponack, L.L.P.
- Priority: JP2009-095803 20090410
- International Application: PCT/JP2010/002591 WO 20100409
- International Announcement: WO2010/116754 WO 20101014
- Main IPC: G11C11/00
- IPC: G11C11/00

Abstract:
Provided is a programming method for improving the retention characteristics of information in a variable resistance nonvolatile memory element. The method includes: a first writing process of applying a first voltage V1 having a first polarity to set the variable resistance nonvolatile storage element to a low resistance state LR indicating first logic information (S01); a second writing process of applying a second voltage V2 having a second polarity different from the first polarity to set the variable resistance nonvolatile storage element to a first high resistance state HR1 (S02); and a partial write process of applying a third voltage V3 having the first polarity so as to set the variable resistance layer to a second high resistance state HR2 indicating second logic information different from the first logic information (S05). Here, |V3|
Public/Granted literature
- US20110110143A1 METHOD OF PROGRAMMING NONVOLATILE MEMORY ELEMENT Public/Granted day:2011-05-12
Information query