发明授权
- 专利标题: DSP design system level power estimation
- 专利标题(中): DSP设计系统级功率估算
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申请号: US13009467申请日: 2011-01-19
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公开(公告)号: US08402419B1公开(公告)日: 2013-03-19
- 发明人: Jordan Plofsky , Philippe Molson , Francois Pequillat
- 申请人: Jordan Plofsky , Philippe Molson , Francois Pequillat
- 申请人地址: US CA San Jose
- 专利权人: Altera Corporation
- 当前专利权人: Altera Corporation
- 当前专利权人地址: US CA San Jose
- 代理机构: Weaver Austin Villeneuve & Sampson LLP
- 主分类号: G06F17/50
- IPC分类号: G06F17/50
摘要:
Power consumption estimation is performed at the system level in a design process, thus allowing early evaluation of feasibility and other considerations relating to logic/DSP design and hardware implementation of a proposed electronic design. Evaluation of the system level power consumption estimate(s) permits adjustment of a system level representation of the proposed electronic design, prior to investment of substantial resources in the electronic design. Other estimates, including other power consumption estimates, may be performed to adjust the proposed electronic design as well. Such estimates may be made in response to gate level power consumption estimates and/or hardware level power consumption estimates.
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