发明授权
US08407656B2 Method and structure for a transistor having a relatively large threshold voltage variation range and for a random number generator incorporating multiple essentially identical transistors having such a large threshold voltage variation range 有权
具有相对较大的阈值电压变化范围的晶体管的方法和结构,以及包含具有这样大的阈值电压变化范围的多个基本相同的晶体管的随机数发生器的方法和结构

  • 专利标题: Method and structure for a transistor having a relatively large threshold voltage variation range and for a random number generator incorporating multiple essentially identical transistors having such a large threshold voltage variation range
  • 专利标题(中): 具有相对较大的阈值电压变化范围的晶体管的方法和结构,以及包含具有这样大的阈值电压变化范围的多个基本相同的晶体管的随机数发生器的方法和结构
  • 申请号: US13167826
    申请日: 2011-06-24
  • 公开(公告)号: US08407656B2
    公开(公告)日: 2013-03-26
  • 发明人: Terence B. HookJeffrey B. Johnson
  • 申请人: Terence B. HookJeffrey B. Johnson
  • 申请人地址: US NY Armonk
  • 专利权人: International Business Machines Corporation
  • 当前专利权人: International Business Machines Corporation
  • 当前专利权人地址: US NY Armonk
  • 代理机构: Gibb & Riley, LLC
  • 代理商 David A. Cain, Esq.
  • 主分类号: G06F17/50
  • IPC分类号: G06F17/50
Method and structure for a transistor having a relatively large threshold voltage variation range and for a random number generator incorporating multiple essentially identical transistors having such a large threshold voltage variation range
摘要:
Disclosed are a design method and structure for a transistor having a relatively large threshold voltage (Vt) variation range due to exacerbated random dopant fluctuation (RDF). Exacerbated RDF and, thereby a relatively large Vt variation range, is achieved through the use of complementary doping in one or more transistor components and/or through lateral dopant non-uniformity between the channel region and any halo regions. Also disclosed are a design method and structure for a random number generator, which incorporates multiple pairs of essentially identical transistors having such a large Vt variation and which relies on Vt mismatch in pairs of those the transistors to generate a multi-bit output (e.g., a unique identifier for a chip or a secret key). By widening the Vt variation range of the transistors in the random number generator, detecting Vt mismatch between transistors becomes more likely and the resulting multi-bit output will be more stable.
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