• 专利标题: Semiconductor chips having redistributed power/ground lines directly connected to power/ground lines of internal circuits and methods of fabricating the same
  • 申请号: US13344634
    申请日: 2012-01-06
  • 公开(公告)号: US08410611B2
    公开(公告)日: 2013-04-02
  • 发明人: Jong-Joo Lee
  • 申请人: Jong-Joo Lee
  • 申请人地址: KR Suwon-si, Gyeonggi-do
  • 专利权人: Samsung Electronics Co., Ltd.
  • 当前专利权人: Samsung Electronics Co., Ltd.
  • 当前专利权人地址: KR Suwon-si, Gyeonggi-do
  • 代理机构: Volentine & Whitt, PLLC
  • 优先权: KR2005-0022787 20050318
  • 主分类号: H01L23/48
  • IPC分类号: H01L23/48
Semiconductor chips having redistributed power/ground lines directly connected to power/ground lines of internal circuits and methods of fabricating the same
摘要:
Provided are embodiments of semiconductor chips having a redistributed metal interconnection directly connected to power/ground lines of an internal circuit are provided. Embodiments of the semiconductor chips include an internal circuit formed on a semiconductor substrate. A chip pad is disposed on the semiconductor substrate. The chip pad is electrically connected to the internal circuit through an internal interconnection. A passivation layer is provided over the chip pad. A redistributed metal interconnection is provided on the passivation layer. The redistributed metal interconnection directly connects the internal interconnection to the chip pad through a via-hole and a chip pad opening, which penetrate at least the passivation layer. Methods of fabricating the semiconductor chip are also provided.
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