Invention Grant
- Patent Title: Method and apparatus for reducing power consumption for memories
- Patent Title (中): 用于降低存储器功耗的方法和装置
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Application No.: US12824597Application Date: 2010-06-28
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Publication No.: US08412972B2Publication Date: 2013-04-02
- Inventor: Kin-Hang Cheung , Neelam Chandwani , Chetan D. Hiremath , Udayan Mukherjee , Rakesh Dodeja
- Applicant: Kin-Hang Cheung , Neelam Chandwani , Chetan D. Hiremath , Udayan Mukherjee , Rakesh Dodeja
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: G06F11/30
- IPC: G06F11/30

Abstract:
Described herein are a method and an apparatus for reducing power consumption of memories by monitoring the power states of the memories via an operating system. The method comprises reading counter values corresponding to power states of each memory of a plurality memories; computing a power state usage corresponding to the power states of each memory of the plurality, the computing based on the counter values; determining whether the power state usage exceeds a predetermined threshold usage; and adjusting current and future usage of each memory of the plurality in response to determining that the power state usage exceeds the predetermined threshold usage.
Public/Granted literature
- US20110320847A1 METHOD AND APPARATUS FOR REDUCING POWER CONSUMPTION FOR MEMORIES Public/Granted day:2011-12-29
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