Invention Grant
US08432737B2 Nonvolatile semiconductor memory device and method testing the same
有权
非易失性半导体存储器件和方法测试相同
- Patent Title: Nonvolatile semiconductor memory device and method testing the same
- Patent Title (中): 非易失性半导体存储器件和方法测试相同
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Application No.: US13217512Application Date: 2011-08-25
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Publication No.: US08432737B2Publication Date: 2013-04-30
- Inventor: Hitoshi Shiga
- Applicant: Hitoshi Shiga
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2010-192083 20100830
- Main IPC: G11C11/34
- IPC: G11C11/34

Abstract:
When performing a word line leak test to determine a leak state of the word lines, the control circuit applies, from the voltage control circuit to the word lines connected to the memory cell array written with test pattern data, voltages corresponding to the test pattern data. Thereafter, it switches the transfer transistors to a nonconductive state, thereby setting the word lines in a floating state. After a lapse of a certain time from switching of the transfer transistors to a nonconductive state, it activates the sense amplifier circuit to perform a read operation in the memory cell array. Then it compares a result of the read operation with an expectation value corresponding to the test pattern data.
Public/Granted literature
- US20120051134A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD TESTING THE SAME Public/Granted day:2012-03-01
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