发明授权
US08433851B2 Reducing wiring congestion in a cache subsystem utilizing sectored caches with discontiguous addressing
失效
减少缓存子系统中的布线拥塞,利用具有不连续寻址的扇区缓存
- 专利标题: Reducing wiring congestion in a cache subsystem utilizing sectored caches with discontiguous addressing
- 专利标题(中): 减少缓存子系统中的布线拥塞,利用具有不连续寻址的扇区缓存
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申请号: US11839663申请日: 2007-08-16
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公开(公告)号: US08433851B2公开(公告)日: 2013-04-30
- 发明人: Leo James Clark , James Stephen Fields, Jr. , Guy Lynn Guthrie , William John Starke , Derek Edward Williams , Phillip G. Williams
- 申请人: Leo James Clark , James Stephen Fields, Jr. , Guy Lynn Guthrie , William John Starke , Derek Edward Williams , Phillip G. Williams
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理机构: Yudell Isidore Ng Russell PLLC
- 主分类号: G06F12/08
- IPC分类号: G06F12/08
摘要:
A method and computer system for reducing the wiring congestion, required real estate, and access latency in a cache subsystem with a sectored and sliced lower cache by re-configuring sector-to-slice allocation and the lower cache addressing scheme. With this allocation, sectors having discontiguous addresses are placed within the same slice, and a reduced-wiring scheme is possible between two levels of lower caches based on this re-assignment of the addressable sectors within the cache slices. Additionally, the lower cache effective address tag is re-configured such that the address fields previously allocated to identifying the sector and the slice are switched relative to each other's location within the address tag. This re-allocation of the address bits enables direct slice addressing based on the indicated sector.
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