Invention Grant
US08436429B2 Stacked power semiconductor device using dual lead frame and manufacturing method
有权
采用双引线框架的叠层功率半导体器件及其制造方法
- Patent Title: Stacked power semiconductor device using dual lead frame and manufacturing method
- Patent Title (中): 采用双引线框架的叠层功率半导体器件及其制造方法
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Application No.: US13118445Application Date: 2011-05-29
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Publication No.: US08436429B2Publication Date: 2013-05-07
- Inventor: Yan Xun Xue , Yueh-Se Ho , Lei Shi , Jun Lu , Liang Zhao
- Applicant: Yan Xun Xue , Yueh-Se Ho , Lei Shi , Jun Lu , Liang Zhao
- Applicant Address: US CA Sunnyvale
- Assignee: Alpha & Omega Semiconductor, Inc.
- Current Assignee: Alpha & Omega Semiconductor, Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: CH Emily LLC
- Agent Chein-Hwa Tsao
- Main IPC: H01L27/088
- IPC: H01L27/088

Abstract:
A stacked power semiconductor device includes vertical metal oxide semiconductor field-effect transistors and dual lead frames packaged with flip-chip technology. In the method of manufacturing the stacked power semiconductor device, a first semiconductor chip is flip chip mounted on the first lead frame. A mounting clips is connected to the electrode at back side of the first semiconductor chip. A second semiconductor chip is mounted on the second lead frame, which is then flipped and stacked on the mounting clip.
Public/Granted literature
- US20120299119A1 STACKED POWER SEMICONDUCTOR DEVICE USING DUAL LEAD FRAME AND MANUFACTURING METHOD Public/Granted day:2012-11-29
Information query
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