Invention Grant
US08471316B2 Isolation area between semiconductor devices having additional active area
有权
具有附加有效面积的半导体器件之间的隔离区域
- Patent Title: Isolation area between semiconductor devices having additional active area
- Patent Title (中): 具有附加有效面积的半导体器件之间的隔离区域
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Application No.: US13227099Application Date: 2011-09-07
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Publication No.: US08471316B2Publication Date: 2013-06-25
- Inventor: Hsin-Chih Tai , Keh-Chiang Ku , Duli Mao , Vincent Venezia , Gang Chen
- Applicant: Hsin-Chih Tai , Keh-Chiang Ku , Duli Mao , Vincent Venezia , Gang Chen
- Applicant Address: US CA Santa Clara
- Assignee: OmniVision Technologies, Inc.
- Current Assignee: OmniVision Technologies, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely Sokoloff Taylor & Zafman LLP
- Main IPC: H01L31/062
- IPC: H01L31/062

Abstract:
An isolation area that provides additional active area between semiconductor devices on an integrated circuit is described. In one embodiment, the invention includes a complementary metal oxide semiconductor transistor of an image sensor having a source, a drain, and a gate between the source and the drain, the transistor having a channel to couple the source and the drain under the influence of the gate, and an isolation barrier surrounding a periphery of the source and the drain to isolate the source and the drain from other devices, wherein the isolation barrier is distanced from the central portion of the channel.
Public/Granted literature
- US20130056808A1 Isolation Area Between Semiconductor Devices Having Additional Active Area Public/Granted day:2013-03-07
Information query
IPC分类: