Invention Grant
US08473645B2 Varying host interface signaling speeds in a storage array 有权
存储阵列中不同的主机接口信号速度

Varying host interface signaling speeds in a storage array
Abstract:
An apparatus comprising an interface circuit and a controller. The interface circuit may be configured to calculate a speed signal in response to data traffic measured over a network. The controller may be configured to present and receive data from an array in response to (a) the speed signal and (b) one or more input/output requests. The interface circuit may generate the speed signal in response to a plurality of predetermined factors. The controller may present and receive the data at one of a plurality of speeds in response to the speed signal.
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