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1.发明授权System and method to efficiently schedule and/or commit write data to flash based SSDs attached to an array controller 有权用于有效地安排和/或提交将数据写入到阵列控制器的基于闪存的SSD的系统和方法公开(公告)号：US08615640B2
公开(公告)日：2013-12-24
申请号：US13050265
申请日：2011-03-17
Applicant: Mahmoud K. Jibbe , Dhishankar Sengupta , Arunkumar Ragendran
Inventor： Mahmoud K. Jibbe , Dhishankar Sengupta , Arunkumar Ragendran
IPC: G06F12/04
CPC classification number: G06F12/0246 , G06F11/108 , G06F2212/7208 , G06F2212/7211
Abstract: An apparatus comprising a controller and an array. The controller may be configured to generate control signals in response to one or more input requests. The array may comprise a plurality of solid state devices. The solid state devices may be configured to (i) read and/or write data in response to the control signals received from the controller and (ii) distribute writes across the plurality of solid state devices such that each of said solid state devices has a similar number of writes.
Abstract translation: 一种包括控制器和阵列的装置。 控制器可以被配置为响应于一个或多个输入请求而产生控制信号。 阵列可以包括多个固态器件。 固态设备可以被配置为（i）响应于从控制器接收的控制信号读取和/或写入数据，以及（ii）分布跨越多个固态设备的写入，使得每个所述固态设备具有 相似的写入次数。
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2.发明申请SYSTEM AND METHOD TO EFFICIENTLY SCHEDULE AND/OR COMMIT WRITE DATA TO FLASH BASED SSDs ATTACHED TO AN ARRAY CONTROLLER 有权用于有效地安排和/或提交写数据的系统和方法，用于将闪存的固态盘连接到阵列控制器公开(公告)号：US20120239857A1
公开(公告)日：2012-09-20
申请号：US13050265
申请日：2011-03-17
Applicant: Mahmoud K. Jibbe , Dhishankar Sengupta , Arunkumar Ragendran
Inventor： Mahmoud K. Jibbe , Dhishankar Sengupta , Arunkumar Ragendran
IPC: G06F12/00
CPC classification number: G06F12/0246 , G06F11/108 , G06F2212/7208 , G06F2212/7211
Abstract: An apparatus comprising a controller and an array. The controller may be configured to generate control signals in response to one or more input requests. The array may comprise a plurality of solid state devices. The solid state devices may be configured to (i) read and/or write data in response to the control signals received from the controller and (ii) distribute writes across the plurality of solid state devices such that each of said solid state devices has a similar number of writes.
Abstract translation: 一种包括控制器和阵列的装置。 控制器可以被配置为响应于一个或多个输入请求而产生控制信号。 阵列可以包括多个固态器件。 固态设备可以被配置为（i）响应于从控制器接收的控制信号读取和/或写入数据，以及（ii）分布跨越多个固态设备的写入，使得每个所述固态设备具有 相似的写入次数。
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3.发明授权System and method to establish and/or manage a trusted relationship between a host to storage array controller and/or a storage array to storage array controller 有权建立和/或管理主机与存储阵列控制器和/或存储阵列到存储阵列控制器之间的信任关系的系统和方法公开(公告)号：US08762730B2
公开(公告)日：2014-06-24
申请号：US13085777
申请日：2011-04-13
Applicant: Mahmoud K. Jibbe , Senthil Kannan , Arunkumar Ragendran , Britto Rossario
Inventor： Mahmoud K. Jibbe , Senthil Kannan , Arunkumar Ragendran , Britto Rossario
CPC classification number: H04L9/3234 , G06F21/44
Abstract: A method for establishing a secure connection between a first computer and a second computer, comprising the steps of (A) generating a signature authentication pair on the first computer, (B) receiving a plurality of authentication pairs that may or may not include the signature authentication pair, (C) detecting whether the signature authentication pair is received in the authentication pairs and (D) if the signature authentication pair is detected, creating a secure connection between the first computer and the second computer.
Abstract translation: 一种用于在第一计算机和第二计算机之间建立安全连接的方法，包括以下步骤：（A）在所述第一计算机上生成签名认证对，（B）接收可以包含或不包括签名的多个认证对 验证对，（C）检测认证对中是否接收到签名认证对，以及（D）如果检测到签名认证对，则在第一计算机和第二计算机之间建立安全连接。
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Patent Agency Ranking
公开(公告)号：US20120260007A1
公开(公告)日：2012-10-11
申请号：US13083864
申请日：2011-04-11
Applicant: Mahmoud K. Jibbe , Arunkumar Ragendran , Britto Rossario , Senthil Kannan
Inventor： Mahmoud K. Jibbe , Arunkumar Ragendran , Britto Rossario , Senthil Kannan
IPC: G06F13/10
CPC classification number: G06F3/0613 , G06F3/0625 , G06F3/0634 , G06F3/067 , Y02D10/154
Abstract: An apparatus comprising an interface circuit and a controller. The interface circuit may be configured to calculate a speed signal in response to data traffic measured over a network. The controller may be configured to present and receive data from an array in response to (a) the speed signal and (b) one or more input/output requests. The interface circuit may generate the speed signal in response to a plurality of predetermined factors. The controller may present and receive the data at one of a plurality of speeds in response to the speed signal.
Abstract translation: 一种包括接口电路和控制器的装置。 接口电路可以被配置为响应于通过网络测量的数据业务来计算速度信号。 控制器可以被配置为响应于（a）速度信号和（b）一个或多个输入/输出请求，从阵列呈现和接收数据。 接口电路可以响应于多个预定因素而产生速度信号。 控制器可以响应于速度信号以多个速度中的一个呈现和接收数据。
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5.发明授权System and method to flag a source of data corruption in a storage subsystem using persistent source identifier bits 有权使用持久性源标识符位来标记存储子系统中的数据损坏源的系统和方法公开(公告)号：US08843808B2
公开(公告)日：2014-09-23
申请号：US13173184
申请日：2011-06-30
Applicant: Mahmoud K. Jibbe , Arunkumar Ragendran , Britto Rossario , Senthil Kannan , Padmanabhan Pandurangan
Inventor： Mahmoud K. Jibbe , Arunkumar Ragendran , Britto Rossario , Senthil Kannan , Padmanabhan Pandurangan
CPC classification number: G06F11/0727 , G06F11/0772 , G06F11/1004 , G06F2211/1088
Abstract: An apparatus comprising an array controller and a frame buffer. The array controller may be configured to read/write data to/from a drive array in response to one or more input/output requests. The frame buffer may be implemented within the array controller and may be configured to perform (i) a first data integrity check to determine a first type of data error and (ii) a second data integrity check to determine a second type of data error. The frame buffer may log occurrences of the first type of error and the second type of error in a field transmitted with the data. The field may be used to determine a source of possible corruption of the data.
Abstract translation: 一种包括阵列控制器和帧缓冲器的装置。 阵列控制器可以被配置为响应于一个或多个输入/输出请求向/从驱动器阵列读取/写入数据。 帧缓冲器可以在阵列控制器内实现，并且可以被配置为执行（i）第一数据完整性检查以确定第一类型的数据错误，以及（ii）第二数据完整性检查以确定第二类型的数据错误。 帧缓冲器可以在与数据一起发送的字段中记录第一类型的错误和第二类型的错误的出现。 该字段可用于确定可能的数据损坏的来源。
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公开(公告)号：US08473645B2
公开(公告)日：2013-06-25
申请号：US13083864
申请日：2011-04-11
Applicant: Mahmoud K. Jibbe , Arunkumar Ragendran , Britto Rossario , Senthil Kannan
Inventor： Mahmoud K. Jibbe , Arunkumar Ragendran , Britto Rossario , Senthil Kannan
IPC: G06F13/00
CPC classification number: G06F3/0613 , G06F3/0625 , G06F3/0634 , G06F3/067 , Y02D10/154
Abstract: An apparatus comprising an interface circuit and a controller. The interface circuit may be configured to calculate a speed signal in response to data traffic measured over a network. The controller may be configured to present and receive data from an array in response to (a) the speed signal and (b) one or more input/output requests. The interface circuit may generate the speed signal in response to a plurality of predetermined factors. The controller may present and receive the data at one of a plurality of speeds in response to the speed signal.
Abstract translation: 一种包括接口电路和控制器的装置。 接口电路可以被配置为响应于通过网络测量的数据业务来计算速度信号。 控制器可以被配置为响应于（a）速度信号和（b）一个或多个输入/输出请求，从阵列呈现和接收数据。 接口电路可以响应于多个预定因素而产生速度信号。 控制器可以响应于速度信号以多个速度中的一个呈现和接收数据。
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7.发明申请SYSTEM AND METHOD TO FLAG A SOURCE OF DATA CORRUPTION IN A STORAGE SUBSYSTEM USING PERSISTENT SOURCE IDENTIFIER BITS 有权使用暂时源标识符位置在存储子系统中标记数据腐败的源的系统和方法公开(公告)号：US20130007531A1
公开(公告)日：2013-01-03
申请号：US13173184
申请日：2011-06-30
Applicant: Mahmoud K. Jibbe , Arunkumar Ragendran , Britto Rossario , Senthil Kannan , Padmanabhan Pandurangan
Inventor： Mahmoud K. Jibbe , Arunkumar Ragendran , Britto Rossario , Senthil Kannan , Padmanabhan Pandurangan
IPC: G06F11/07
CPC classification number: G06F11/0727 , G06F11/0772 , G06F11/1004 , G06F2211/1088
Abstract: An apparatus comprising an array controller and a frame buffer. The array controller may be configured to read/write data to/from a drive array in response to one or more input/output requests. The frame buffer may be implemented within the array controller and may be configured to perform (i) a first data integrity check to determine a first type of data error and (ii) a second data integrity check to determine a second type of data error. The frame buffer may log occurrences of the first type of error and the second type of error in a field transmitted with the data. The field may be used to determine a source of possible corruption of the data.
Abstract translation: 一种包括阵列控制器和帧缓冲器的装置。 阵列控制器可以被配置为响应于一个或多个输入/输出请求向/从驱动器阵列读取/写入数据。 帧缓冲器可以在阵列控制器内实现，并且可以被配置为执行（i）第一数据完整性检查以确定第一类型的数据错误，以及（ii）第二数据完整性检查以确定第二类型的数据错误。 帧缓冲器可以在与数据一起发送的字段中记录第一类型的错误和第二类型的错误的出现。 该字段可用于确定可能的数据损坏的来源。
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8.发明申请SYSTEM AND METHOD TO ESTABLISH AND/OR MANAGE A TRUSTED RELATIONSHIP BETWEEN A HOST TO STORAGE ARRAY CONTROLLER AND/OR A STORAGE ARRAY TO STORAGE ARRAY CONTROLLER 有权建立和/或管理托管到存储阵列控制器和/或存储阵列之间的存储阵列控制器之间的有害关系的系统和方法公开(公告)号：US20120265994A1
公开(公告)日：2012-10-18
申请号：US13085777
申请日：2011-04-13
Applicant: Mahmoud K. Jibbe , Senthil Kannan , Arunkumar Ragendran , Britto Rossario
Inventor： Mahmoud K. Jibbe , Senthil Kannan , Arunkumar Ragendran , Britto Rossario
IPC: H04L9/32
CPC classification number: H04L9/3234 , G06F21/44
Abstract: A method for establishing a secure connection between a first computer and a second computer, comprising the steps of (A) generating a signature authentication pair on the first computer, (B) receiving a plurality of authentication pairs that may or may not include the signature authentication pair, (C) detecting whether the signature authentication pair is received in the authentication pairs and (D) if the signature authentication pair is detected, creating a secure connection between the first computer and the second computer.
Abstract translation: 一种用于在第一计算机和第二计算机之间建立安全连接的方法，包括以下步骤：（A）在所述第一计算机上生成签名认证对，（B）接收可以包含或不包括签名的多个认证对 验证对，（C）检测认证对中是否接收到签名认证对，以及（D）如果检测到签名认证对，则在第一计算机和第二计算机之间建立安全连接。
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