发明授权
US08481420B2 Integrated circuit packaging system with lead frame stacking module and method of manufacture thereof
有权
具有引线框架堆叠模块的集成电路封装系统及其制造方法
- 专利标题: Integrated circuit packaging system with lead frame stacking module and method of manufacture thereof
- 专利标题(中): 具有引线框架堆叠模块的集成电路封装系统及其制造方法
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申请号: US13048859申请日: 2011-03-15
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公开(公告)号: US08481420B2公开(公告)日: 2013-07-09
- 发明人: Jong-Woo Ha , DaeSik Choi , Byoung Wook Jang
- 申请人: Jong-Woo Ha , DaeSik Choi , Byoung Wook Jang
- 申请人地址: SG Singapore
- 专利权人: STATS Chippac Ltd.
- 当前专利权人: STATS Chippac Ltd.
- 当前专利权人地址: SG Singapore
- 代理机构: Ishimaru & Associates LLP
- 主分类号: H01L21/44
- IPC分类号: H01L21/44 ; H01L21/48
摘要:
A method of manufacture of an integrated circuit packaging system includes: providing an integrated circuit die having an active side and a passive side; providing a contact pad having a top side oriented in a same direction as the passive side; connecting an inner bond wire to the contact pad and the integrated circuit die; and molding a stacking structure around the contact pad, the inner bond wire, and the integrated circuit die with the passive side and the top side exposed, and the stacking structure having a top structure surface on top and adjacent to or below the integrated circuit die, and a horizontal member under the integrated circuit die and forming a cavity.
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