发明授权
US08482999B2 Semiconductor memory integrated device having a precharge circuit with thin-film transistors gated by a voltage higher than a power supply voltage
有权
半导体存储器集成器件具有通过高于电源电压的电压而门控的薄膜晶体管的预充电电路
- 专利标题: Semiconductor memory integrated device having a precharge circuit with thin-film transistors gated by a voltage higher than a power supply voltage
- 专利标题(中): 半导体存储器集成器件具有通过高于电源电压的电压而门控的薄膜晶体管的预充电电路
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申请号: US13600412申请日: 2012-08-31
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公开(公告)号: US08482999B2公开(公告)日: 2013-07-09
- 发明人: Hiroyuki Takahashi , Tetsuo Fukushi
- 申请人: Hiroyuki Takahashi , Tetsuo Fukushi
- 申请人地址: JP Kanagawa
- 专利权人: Renesas Electronics Corporation
- 当前专利权人: Renesas Electronics Corporation
- 当前专利权人地址: JP Kanagawa
- 代理机构: Foley & Lardner LLP
- 优先权: JP2009-117889 20090514
- 主分类号: G11C7/12
- IPC分类号: G11C7/12
摘要:
Provided is a semiconductor integrated device including a semiconductor memory circuit and a peripheral circuit of the semiconductor memory circuit. The peripheral circuit includes a first transistor having a first voltage as a breakdown voltage of a gate oxide film. The semiconductor memory circuit includes a pair of bit lines, one of the pair of bit lines being connected to a gate transistor of a memory cell, and a precharge circuit that includes a transistor having a breakdown voltage substantially equal to that of the first transistor, and precharges the pair of bit lines to a predetermined voltage in response to an activation signal. The activation signal of the precharge circuit is a second voltage higher than the first voltage.
公开/授权文献
- US20120327732A1 SEMICONDUCTOR INTEGRATED DEVICE 公开/授权日:2012-12-27