Invention Grant
- Patent Title: Method for thinning and dicing electronic circuit wafers
- Patent Title (中): 电子电路晶片薄化和切割的方法
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Application No.: US13313282Application Date: 2011-12-07
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Publication No.: US08486763B2Publication Date: 2013-07-16
- Inventor: Vincent Jarry , Marc Feron
- Applicant: Vincent Jarry , Marc Feron
- Applicant Address: FR Tours
- Assignee: STMicroelectronics (Tours) SAS
- Current Assignee: STMicroelectronics (Tours) SAS
- Current Assignee Address: FR Tours
- Agency: The Noblitt Group, PLLC
- Priority: FR1060375 20101210
- Main IPC: H01L21/00
- IPC: H01L21/00
Abstract:
A method for thinning and dicing a wafer of electronic circuits, wherein: a thinning step is carried out while the wafer is supported by a first film bonded at the periphery of a support frame; and a dicing step is carried out while the thinned wafer is supported by a second film bonded at the periphery of the same frame from the other surface of the wafer, the first film being unstuck only once the second one is in place.
Public/Granted literature
- US20120149174A1 METHOD FOR THINNING AND DICING ELECTRONIC CIRCUIT WAFERS Public/Granted day:2012-06-14
Information query
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