Invention Grant
- Patent Title: Method for fabricating semiconductor device
- Patent Title (中): 制造半导体器件的方法
-
Application No.: US11898140Application Date: 2007-09-10
-
Publication No.: US08486832B2Publication Date: 2013-07-16
- Inventor: Yasunori Morinaga , Hideo Nakagawa
- Applicant: Yasunori Morinaga , Hideo Nakagawa
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JP2007-022896 20070201
- Main IPC: H01L21/44
- IPC: H01L21/44
Abstract:
A trench is formed in an interlayer dielectric formed on a substrate, then a barrier seed film is formed to cover the interlayer dielectric and the inner walls of the trench, and copper is embedded in the trench by electrolytic plating using the barrier seed film as an electrode. The barrier seed film is a single-layer film made of an oxide or nitride of a refractory metal and contains a low-resistance metal other than copper.
Public/Granted literature
- US20080188076A1 Method for fabricating semiconductor device Public/Granted day:2008-08-07
Information query
IPC分类:
