发明授权
- 专利标题： Method for fabricating semiconductor device
- 专利标题（中）： 制造半导体器件的方法
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申请号： US11898140申请日： 2007-09-10
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公开(公告)号： US08486832B2公开(公告)日： 2013-07-16
- 发明人: Yasunori Morinaga , Hideo Nakagawa
- 申请人： Yasunori Morinaga , Hideo Nakagawa
- 申请人地址： JP Osaka
- 专利权人： Panasonic Corporation
- 当前专利权人： Panasonic Corporation
- 当前专利权人地址： JP Osaka
- 代理机构： McDermott Will & Emery LLP
- 优先权： JP2007-022896 20070201
- 主分类号： H01L21/44
- IPC分类号： H01L21/44
摘要：
A trench is formed in an interlayer dielectric formed on a substrate, then a barrier seed film is formed to cover the interlayer dielectric and the inner walls of the trench, and copper is embedded in the trench by electrolytic plating using the barrier seed film as an electrode. The barrier seed film is a single-layer film made of an oxide or nitride of a refractory metal and contains a low-resistance metal other than copper.
公开/授权文献
- US20080188076A1 Method for fabricating semiconductor device 公开/授权日：2008-08-07
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