发明授权
US08497171B1 FinFET method and structure with embedded underlying anti-punch through layer
有权
FinFET方法和结构具有嵌入式底层抗穿透层
- 专利标题: FinFET method and structure with embedded underlying anti-punch through layer
- 专利标题(中): FinFET方法和结构具有嵌入式底层抗穿透层
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申请号: US13541806申请日: 2012-07-05
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公开(公告)号: US08497171B1公开(公告)日: 2013-07-30
- 发明人: Wei-Hao Wu , Kai-Chieh Yang , Wen-Hsing Hsieh , Ken-Ichi Goto , Zhiqiang Wu
- 申请人: Wei-Hao Wu , Kai-Chieh Yang , Wen-Hsing Hsieh , Ken-Ichi Goto , Zhiqiang Wu
- 申请人地址: unknown Hsin-Chu
- 专利权人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人地址: unknown Hsin-Chu
- 代理机构: Duane Morris LLP
- 主分类号: H01L21/8238
- IPC分类号: H01L21/8238
摘要:
Methods and structures for forming semiconductor FinFET devices with superior repeatability and reliability include providing APT (anti-punch through) layer accurately formed beneath a semiconductor fins, are provided. Both the n-type and p-type APT layers are formed prior to the formation of the material from which the semiconductor fin is formed. In some embodiments, barrier layers are added between the accurately positioned APT layer and the semiconductor fin. Ion implantation methods and epitaxial growth methods are used to form appropriately doped APT layers in a semiconductor substrate surface. The fin material is formed over the APT layers using epitaxial growth/deposition methods.
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