Invention Grant
US08501575B2 Method of forming multilayer capacitors in a printed circuit substrate
有权
在印刷电路基板中形成多层电容器的方法
- Patent Title: Method of forming multilayer capacitors in a printed circuit substrate
- Patent Title (中): 在印刷电路基板中形成多层电容器的方法
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Application No.: US12909983Application Date: 2010-10-22
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Publication No.: US08501575B2Publication Date: 2013-08-06
- Inventor: Rabindra N. Das , Frank D. Egitto , How T. Lin , John M. Lauffer , Voya R. Markovich
- Applicant: Rabindra N. Das , Frank D. Egitto , How T. Lin , John M. Lauffer , Voya R. Markovich
- Applicant Address: US NY Endicott
- Assignee: Endicott Interconnect Technologies, Inc.
- Current Assignee: Endicott Interconnect Technologies, Inc.
- Current Assignee Address: US NY Endicott
- Agency: Hinman, Howard & Kattell, LLP
- Agent Mark Levy
- Main IPC: H01G4/00
- IPC: H01G4/00

Abstract:
Methods of forming embedded, multilayer capacitors in printed circuit boards wherein copper or other electrically conductive channels are formed on a dielectric substrate. The channels may be preformed using etching or deposition techniques. A photoimageable dielectric is an upper surface of the laminate. Exposing and etching the photoimageable dielectric exposes the space between the copper traces. These spaces are then filled with a capacitor material. Finally, copper is either laminated or deposited atop the structure. This upper copper layer is then etched to provide electrical interconnections to the capacitor elements. Traces may be formed to a height to meet a plane defining the upper surface of the dielectric substrate or thin traces may be formed on the remaining dielectric surface and a secondary copper plating process is utilized to raise the height of the traces.
Public/Granted literature
- US20120223047A1 METHOD OF FORMING MULTILAYER CAPACITORS IN A PRINTED CIRCUIT SUBSTRATE Public/Granted day:2012-09-06
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