公开(公告)号：US20130033827A1

公开(公告)日：2013-02-07

申请号：US13198756

申请日：2011-08-05

申请人： Rabindra N. Das ,  Voya R. Markovich ,  John M. Lauffer ,  Roy H. Magnuson ,  Konstantinos I. Papathomas ,  Benson Chan

发明人： Rabindra N. Das ,  Voya R. Markovich ,  John M. Lauffer ,  Roy H. Magnuson ,  Konstantinos I. Papathomas ,  Benson Chan

IPC分类号： H05K5/00 ,  H05K1/09 ,  B23K31/02 ,  H05K1/00 ,  H01B1/00 ,  H01B1/02

CPC分类号： H05K1/0313 ,  B23K26/382 ,  B23K26/40 ,  B23K2101/40 ,  B23K2103/16 ,  B23K2103/172 ,  B23K2103/52 ,  H01B1/22 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/01322 ,  H01L2924/15311 ,  H05K1/097 ,  H05K3/4053 ,  H05K3/4069 ,  H05K3/462 ,  H05K3/4623 ,  H05K3/4641 ,  H05K2201/0257 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09718 ,  H05K2201/10378 ,  H05K2203/0425 ,  H05K2203/1152 ,  Y10T29/49128 ,  Y10T29/49165 ,  H01L2924/00

摘要： A multilayer capable electrically conductive adhesive (ECA) mixture for connecting multilevel Z-axis interconnects and a method of forming the ECA for connecting multilevel Z-axis interconnects. The multilayer capable ECA contains a mixture of constituent components that allow the paste to be adapted to specific requirements wherein the method of making a circuitized substrate assembly in which two or more subassemblies having potentially disparate coefficients of thermal expansion (CTE) are aligned and Z-axis interconnection are created during bonding. The metallurgies of the conductors, and those of a multilayer capable conductive paste, are effectively mixed and the flowable interim dielectric used between the mating subassemblies flows to engage and surround the conductor coupling.

摘要翻译： 用于连接多级Z轴互连的多层导电粘合剂（ECA）混合物和形成连接多级Z轴互连的ECA的方法。 具有多层能力的ECA包含允许糊料适应特定要求的组成成分的混合物，其中制造电路化衬底组件的方法，其中具有潜在不同的热膨胀系数（CTE）的两个或更多个子组件对齐，并且Z- 在连接期间创建轴互连。 导体的冶金和多层导电浆料的冶金被有效地混合，并且在配合子组件之间使用的可流动的中间电介质流动以接合和围绕导体耦合。

公开(公告)号：US20110043987A1

公开(公告)日：2011-02-24

申请号：US12938759

申请日：2010-11-03

申请人： Rabindra N. Das ,  John M. Lauffer ,  Voya R. Markovich

发明人： Rabindra N. Das ,  John M. Lauffer ,  Voya R. Markovich

IPC分类号： G06F1/16 ,  H05K7/00 ,  B82Y30/00

CPC分类号： H05K1/167 ,  H01G4/206 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/0102 ,  H01L2924/01025 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/3011 ,  H05K1/095 ,  H05K1/162 ,  H05K3/0023 ,  H05K2201/0187 ,  H05K2201/0209 ,  H05K2201/0215 ,  H05K2201/0257 ,  H05K2203/1453 ,  Y10T29/49082 ,  Y10T29/49087 ,  Y10T29/49089 ,  Y10T29/49091 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/0401

摘要： A method of making a circuitized substrate including a resistor comprised of material which includes a polymer resin and a quantity of nano-powders including a mixture of at least one metal component and at least one ceramic component. The ceramic component may be a ferroelectric ceramic and/or a high surface area ceramic and/or a transparent oxide and/or a dope manganite. Alternatively, the material will include the polymer resin and nano-powders, with the nano-powders comprising at least one metal coated ceramic and/or at least one oxide coated metal component. An electrical assembly (substrate and at least one electrical component) and an information handling system (e.g., personal computer) utilizing such a circuitized substrate are also provided.

摘要翻译： 一种制造电路化基板的方法，包括由包括聚合物树脂的材料和包括至少一种金属组分和至少一种陶瓷组分的混合物的纳米粉末的量组成的电阻器。 陶瓷部件可以是铁电陶瓷和/或高表面积陶瓷和/或透明氧化物和/或掺杂亚锰酸盐。 或者，材料将包括聚合物树脂和纳米粉末，其中纳米粉末包含至少一种金属涂覆的陶瓷和/或至少一种氧化物涂覆的金属组分。 还提供了使用这种电路化基板的电气组件（基板和至少一个电气部件）以及信息处理系统（例如，个人计算机）。

公开(公告)号：US07838776B2

公开(公告)日：2010-11-23

申请号：US12148271

申请日：2008-04-17

申请人： John M. Lauffer ,  Voya R. Markovich ,  Michael Wozniak

发明人： John M. Lauffer ,  Voya R. Markovich ,  Michael Wozniak

IPC分类号： H05K1/03

CPC分类号： H01L21/4857 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01021 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/3011 ,  H05K3/383 ,  H05K3/4641 ,  H05K2201/0355 ,  H05K2201/09318 ,  H05K2203/0353 ,  Y10S428/901 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T428/12556 ,  Y10T428/12993 ,  H01L2224/0401

摘要： A circuitized substrate in which two conductive layers (e.g., electroplated copper foil) are bonded (e.g., laminated) to an interim dielectric layer. Each of the two foil surfaces which physically bond to the dielectric are smooth (e.g., preferably by chemical processing) and include a thin, organic layer thereon, while the outer surfaces of both foils are also smooth (e.g., preferably also using a chemical processing step). One of these resulting conductive layers may function as a ground or voltage plane while the other may function as a signal plane with a plurality of individual signal lines as part thereof. An electrical assembly and an information handling system utilizing such a circuitized substrate are also provided.

摘要翻译： 其中两个导电层（例如，电镀铜箔）被结合（例如层压）到电介质层的电路化衬底。 物理地结合到电介质的两个箔表面中的每一个是光滑的（例如，优选通过化学处理），并且在其上包括薄的有机层，而两个箔的外表面也是光滑的（例如，优选也使用化学处理 步）。 这些导电层中的一个可以用作接地或电压平面，而另一个可以用作具有多个单独信号线作为其一部分的信号平面。 还提供了使用这种电路化基板的电气组件和信息处理系统。

公开(公告)号：US07530167B2

公开(公告)日：2009-05-12

申请号：US11634287

申请日：2006-12-06

申请人： John M. Lauffer ,  Voya R. Markovich ,  James J. McNamara, Jr. ,  David L. Thomas

发明人： John M. Lauffer ,  Voya R. Markovich ,  James J. McNamara, Jr. ,  David L. Thomas

IPC分类号： H01K3/10

CPC分类号： H05K1/0216 ,  H05K1/0228 ,  H05K2201/09236 ,  H05K2201/09672 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49165

摘要： A method of making a printed circuit board in which the board includes a common power plane having dielectric layers on opposing sides thereof and a signal layer on each of said dielectric layers, each signal layer comprising a plurality of substantially parallel signal lines running in substantially similar directions across said signal layers. Predetermined portions of the signal lines in one signal layer are aligned relative to and also parallel to corresponding signal lines in the other signal layer, with the power plane being located between these portions. Through hole connections are provided between selected signal lines in the two layers, these occurring through clearance holes in the power plane so as to be isolated therefrom.

摘要翻译： 一种制造印刷电路板的方法，其中所述基板包括在其相对侧上具有电介质层的公共电源平面和每个所述电介质层上的信号层，每个信号层包括基本相似的多条基本上平行的信号线 跨越所述信号层的方向。 一个信号层中的信号线的预定部分相对于并且平行于另一个信号层中的相应的信号线，而功率平面位于这些部分之间。 在两层中的选定信号线之间提供通孔连接，这些连接通过电源平面中的间隙而发生，从而与其隔离。

公开(公告)号：US07449381B2

公开(公告)日：2008-11-11

申请号：US11352279

申请日：2006-02-13

申请人： Rabindra N. Das ,  John M. Lauffer ,  How T. Lin ,  Voya R. Markovich

发明人： Rabindra N. Das ,  John M. Lauffer ,  How T. Lin ,  Voya R. Markovich

IPC分类号： H01L21/8234 ,  H01L21/00

CPC分类号： H05K1/162 ,  H05K1/113 ,  H05K3/0023 ,  H05K3/4602 ,  H05K2201/0187 ,  H05K2201/0209 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2203/013 ,  H05K2203/0568

摘要： A method of forming a capacitive substrate in which at least one capacitive dielectric layer of material is screen or ink jet printed onto a conductor and the substrate is thereafter processed further, including the addition of thru-holes to couple selected elements within the substrate to form at least two capacitors as internal elements of the substrate. The capacitive substrate may be incorporated within a larger circuitized substrate, e.g., to form an electrical assembly. A method of making an information handling system including such substrates is also provided.

摘要翻译： 一种形成电容衬底的方法，其中材料的至少一个电容介电层被屏幕或喷墨印刷到导体上，然后进一步处理衬底，包括添加通孔以将所选择的元件耦合到衬底内以形成 至少两个电容器作为衬底的内部元件。 电容性衬底可以结合在更大的电路化衬底内，例如以形成电组件。 还提供了一种制造包括这种基板的信息处理系统的方法。

公开(公告)号：US20080238323A1

公开(公告)日：2008-10-02

申请号：US11730404

申请日：2007-04-02

申请人： Benson Chan ,  John E. Kozol ,  John M. Lauffer ,  How T. Lin

发明人： Benson Chan ,  John E. Kozol ,  John M. Lauffer ,  How T. Lin

IPC分类号： H01J7/44

CPC分类号： F21V29/70 ,  F21K9/00 ,  F21K9/69 ,  F21V29/85 ,  F21W2131/202 ,  F21W2131/205 ,  F21Y2115/10 ,  H05K1/189 ,  H05K3/284 ,  H05K2201/10106

摘要： An LED lighting assembly including a plurality of individual LEDs mounted on a common, bendable heat sinking member designed to remove heat from the LEDs during operation and also to be formed (bent) to provide the desired light direction and intensity. Several such assemblies may be used within an LED lamp, as also provided herein. The lamp is ideal for use within medical and dental environments to assure optimal light onto a patient located at a specified distance from the lamp.

摘要翻译： 一种LED照明组件，包括安装在公共的可弯曲的散热构件上的多个单独的LED，该散热构件被设计成在操作期间从LED移除热量并且还被形成（弯曲）以提供期望的光的方向和强度。 如本文也提供的，LED灯内可以使用若干这样的组件。 该灯是理想的在医疗和牙科环境中使用，以确保最佳的光照射到距离灯具指定距离的患者。

公开(公告)号：US07429510B2

公开(公告)日：2008-09-30

申请号：US11352276

申请日：2006-02-13

申请人： Rabindra N. Das ,  John M. Lauffer ,  How T. Lin ,  Voya R. Markovich

发明人： Rabindra N. Das ,  John M. Lauffer ,  How T. Lin ,  Voya R. Markovich

IPC分类号： H01L21/8242 ,  H05K1/16

CPC分类号： H05K1/162 ,  H05K1/113 ,  H05K3/0023 ,  H05K3/4602 ,  H05K2201/0187 ,  H05K2201/0209 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2203/0568

摘要： A method of forming a capacitive substrate in which at least one capacitive dielectric layer of material is screen or ink jet printed onto a conductor and the substrate is thereafter processed further, including the addition of thru-holes to couple selected elements within the substrate to form at least two capacitors as internal elements of the substrate. Photoimageable material is used to facilitate positioning of the capacitive dielectric being printed. The capacitive substrate may be incorporated within a larger circuitized substrate, e.g., to form an electrical assembly. A method of making an information handling system including such substrates is also provided.

摘要翻译： 一种形成电容衬底的方法，其中材料的至少一个电容介电层被屏幕或喷墨印刷到导体上，然后进一步处理衬底，包括添加通孔以将所选择的元件耦合到衬底内以形成 至少两个电容器作为衬底的内部元件。 可光成像材料用于促进正在印刷的电容电介质的定位。 电容性衬底可以结合在更大的电路化衬底内，例如以形成电组件。 还提供了一种制造包括这种基板的信息处理系统的方法。

公开(公告)号：US07353590B2

公开(公告)日：2008-04-08

申请号：US11224191

申请日：2005-09-12

申请人： Kenneth Fallon ,  Miguel A. Jimarez ,  Ross W. Keesler ,  John M. Lauffer ,  Roy H. Magnuson ,  Voya R. Markovich ,  Irv Memis ,  Jim P. Paoletti ,  Marybeth Perrino ,  John A. Welsh ,  William E. Wilson

发明人： Kenneth Fallon ,  Miguel A. Jimarez ,  Ross W. Keesler ,  John M. Lauffer ,  Roy H. Magnuson ,  Voya R. Markovich ,  Irv Memis ,  Jim P. Paoletti ,  Marybeth Perrino ,  John A. Welsh ,  William E. Wilson

IPC分类号： H05K3/36

CPC分类号： H05K3/445 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/50 ,  H01L2924/0002 ,  H05K1/056 ,  H05K1/113 ,  H05K3/0023 ,  H05K3/0052 ,  H05K3/0094 ,  H05K3/06 ,  H05K3/108 ,  H05K3/426 ,  H05K3/429 ,  H05K3/44 ,  H05K3/4623 ,  H05K3/4641 ,  H05K2201/0919 ,  H05K2201/09536 ,  H05K2201/09554 ,  H05K2201/096 ,  H05K2201/10734 ,  H05K2203/0323 ,  H05K2203/0574 ,  H05K2203/0733 ,  H05K2203/1394 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  H01L2924/00

摘要： A method of forming a printed circuit card with a metal power plane layer between two photoimageable dielectric layers is provided. Photoformed metal filled vias and plated through holes are in the photopatternable material, and signal circuitry is on the surfaces of each of the dielectric materials connected to the vias and plated through holes. A border may be around the card including a metal layer terminating in from the edge of one of the dielectric layers. Copper foil with clearance holes is provided. First and second layers of photoimageable curable dielectric material are on opposite sides of the copper. Patterns are developed on the first and second layers of the photoimageable material to reveal the metal layer through vias. Through holes are developed where holes were patterned in both dielectric layers. The surfaces of the photoimageable material, vias and through holes are metallized by copper plating, preferably using photoresist.

摘要翻译： 提供了一种在两个可光成像的电介质层之间形成具有金属功率平面层的印刷电路卡的方法。 光刻图形的金属填充通孔和电镀通孔位于光图案化材料中，信号电路位于连接到通孔和电镀通孔的每个介电材料的表面上。 边框可以在卡的周围，包括从电介质层之一的边缘终止的金属层。 提供带有间隙孔的铜箔。 第一层和第二层可光成像的可固化电介质材料位于铜的相对两侧。 在可光成像材料的第一层和第二层上形成图案以通过通孔显露金属层。 开发了通孔，在两个电介质层中对其进行图案化。 可光成像材料，通孔和通孔的表面通过镀铜进行金属化，优选使用光致抗蚀剂。

公开(公告)号：US06900392B2

公开(公告)日：2005-05-31

申请号：US10933260

申请日：2004-09-03

申请人： James W. Fuller, Jr. ,  John M. Lauffer ,  Voya R. Markovich

发明人： James W. Fuller, Jr. ,  John M. Lauffer ,  Voya R. Markovich

IPC分类号： H05K3/32 ,  H05K3/46 ,  H05K1/03

CPC分类号： H05K3/462 ,  H05K3/321 ,  H05K3/4069 ,  H05K3/429 ,  H05K3/4623 ,  H05K2201/0347 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/49167

摘要： An information handling system (e.g., computer, server, etc.) Utilizing at least one circuitized substrate assembly of robust construction and possessing enhanced operational capabilities. The substrate assemblies include a substrate having at least one opening which is substantially filled with a conductive paste prior to bonding. Once bonded, the paste is also partially located within the other opening to provide an effective electrical connection therewith.

公开(公告)号：US06625857B2

公开(公告)日：2003-09-30

申请号：US09773998

申请日：2001-02-01

申请人： Bernd K. Appelt ,  John M. Lauffer

发明人： Bernd K. Appelt ,  John M. Lauffer

IPC分类号： H01G700

CPC分类号： H05K1/162 ,  H05K1/0366 ,  H05K3/429 ,  H05K3/4641 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2201/0355 ,  H05K2201/09309 ,  Y10T29/435 ,  Y10T29/49002 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/5102

摘要： A method of forming a capacitive element for a circuit board or chip carrier having improved capacitance is provided. The element is formed from a pair of conductive sheets having a dielectric component laminated therebetween. The dielectric component is formed of two or more dielectric sheets, at least one of which can be partially cured followed by being fully cured. The lamination takes place by laminating a partially cured sheet to at least one other sheet of dielectric material and one of the conductive sheets. The total thickness of the two sheets of the dielectric component does not exceed about 4 rolls and preferably does not exceed about 3 mils; thus, the single dielectric sheet does not exceed about 2 mils and preferably does not exceed about 1.5 mils in thickness.

摘要翻译： 提供一种形成用于具有改善的电容的电路板或芯片载体的电容元件的方法。 元件由一对导电片形成，其间具有介质成分。 电介质部件由两个或更多个电介质片材形成，其中至少一个电介质片材可部分固化，然后完全固化。 通过将部分固化的片材层压到至少一种其它电介质材料片和导电片材之一中来进行层压。 两片电介质组件的总厚度不超过约4卷，优选不超过约3密耳; 因此，单个电介质片材的厚度不超过约2密耳，优选不超过约1.5密耳。