发明授权
US08508969B2 Semiconductor device having hierarchically structured bit lines and system including the same 有权
具有分层结构的位线的半导体器件和包括该位线的系统

  • 专利标题: Semiconductor device having hierarchically structured bit lines and system including the same
  • 专利标题(中): 具有分层结构的位线的半导体器件和包括该位线的系统
  • 申请号: US13533896
    申请日: 2012-06-26
  • 公开(公告)号: US08508969B2
    公开(公告)日: 2013-08-13
  • 发明人: Seiji Narui
  • 申请人: Seiji Narui
  • 申请人地址: JP Tokyo
  • 专利权人: Elpida Memory, Inc.
  • 当前专利权人: Elpida Memory, Inc.
  • 当前专利权人地址: JP Tokyo
  • 代理机构: McGinn IP Law Group, PLLC
  • 优先权: JP2009-177404 20090730
  • 主分类号: G11C5/06
  • IPC分类号: G11C5/06
Semiconductor device having hierarchically structured bit lines and system including the same
摘要:
A device includes a first sense amplifier array including a plurality of first sense amplifiers arranged in a first direction, each of the first sense amplifiers including first and second nodes, a plurality of first global bit lines extending in a second direction crossing the first direction, the first global bit lines being arranged in the first direction on a left side of the first sense amplifier array so that the first global bit lines being operatively connected to the first node of an associated one of the first sense amplifiers, and a plurality of second global bit lines extending in the second direction, the second global bit lines being arranged in the first direction on a right side of the first sense amplifier array so that the second global bit lines being operatively connected to the second node of the associated one of the first sense amplifiers.
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