Invention Grant
- Patent Title: Discontinuous thin semiconductor wafer surface features
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Application No.: US13681412Application Date: 2012-11-19
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Publication No.: US08513089B2Publication Date: 2013-08-20
- Inventor: Arvind Chandrasekaran
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agent Michelle Gallardo
- Main IPC: H01L21/76
- IPC: H01L21/76

Abstract:
A semiconductor wafer has a semiconductor substrate and films on the substrate. The substrate and/or the films have at least one etch line creating a discontinuous surface that reduces residual stress in the wafer. Reducing residual stress in the semiconductor wafer reduces warpage of the wafer when the wafer is thin. Additionally, isolation plugs may be used to fill a portion of the etch lines to prevent shorting of the layers.
Public/Granted literature
- US20130084686A1 DISCONTINUOUS THIN SEMICONDUCTOR WAFER SURFACE FEATURES Public/Granted day:2013-04-04
Information query
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