Invention Grant
- Patent Title: Programmable linearity correction circuit for digital-to-analog converter
- Patent Title (中): 用于数模转换器的可编程线性校正电路
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Application No.: US13168017Application Date: 2011-06-24
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Publication No.: US08514112B2Publication Date: 2013-08-20
- Inventor: Roderick McLachlan , Michael Coln
- Applicant: Roderick McLachlan , Michael Coln
- Applicant Address: US MA Norwood
- Assignee: Analog Devices, Inc.
- Current Assignee: Analog Devices, Inc.
- Current Assignee Address: US MA Norwood
- Agency: Kenyon & Kenyon LLP
- Main IPC: H03M1/06
- IPC: H03M1/06

Abstract:
The invention provides a systematic error correction network coupled to a converter. The converter may display a systematic non-linearity error, and the systematic error correction network shapes a correction transform function that acts like counter distortion function for the non-linearity error. The systematic error correction network then scales the correction transform function according to a reference variable, where the magnitude of non-linearity error is related to the reference variable. The scaled correction transform function is then applied to the converter path in order to generate a corrected analog output signal.
Public/Granted literature
- US20120013492A1 PROGRAMMABLE LINEARITY CORRECTION CIRCUIT FOR DIGITAL-TO- ANALOG CONVERTER Public/Granted day:2012-01-19
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