To suppress a timing window from being narrowed undesirably by the harmonic component of a signal output from a semiconductor component without imposing a burden on the semiconductor component that controls access.A capacitor element is arranged in series with a specific transmission path branching from a predetermined node of a signal transmission path and reaching to a ground plane, the signal transmission path supplying an enable control signal that indicates the validity of a clock signal and a command and address signal output from a semiconductor component that controls access on a substrate to another semiconductor component to be accessed on the substrate. The capacitor element functions as a short-circuit path to the ground plane for the harmonic component of the enable control signal and makes smaller the through rate and makes larger the timing window of the enable control signal compared to those when the capacitor element is not provided.