发明授权
US08538015B2 Flexible architecture and instruction for advanced encryption standard (AES)
有权
高级加密标准（AES）的灵活架构和指令
- 专利标题： Flexible architecture and instruction for advanced encryption standard (AES)
- 专利标题（中）： 高级加密标准（AES）的灵活架构和指令
-
申请号： US11729199申请日： 2007-03-28
-
公开(公告)号： US08538015B2公开(公告)日： 2013-09-17
- 发明人: Shay Gueron , Wajdi K. Feghali , Vinodh Gopal , Makaram Raghunandan , Martin G. Dixon , Srinivas Chennupaty , Michael E. Kounavis
- 申请人： Shay Gueron , Wajdi K. Feghali , Vinodh Gopal , Makaram Raghunandan , Martin G. Dixon , Srinivas Chennupaty , Michael E. Kounavis
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 代理机构： Grossman, Tucker, Perreault & Pfleger, PLLC
- 主分类号： G06F21/00
- IPC分类号： G06F21/00
摘要：
A flexible instruction set for a general purpose processor is provided. The instruction set includes instructions to perform a “one round” pass for encryption or decryption and also includes instructions to perform key generation. An immediate may be used to indicate round number and key size for key generation for 128/192/256 bit keys. The flexible instruction set enables full use of pipelining capabilities because it does not require tracking of implicit registers.
公开/授权文献
信息查询
