发明授权
US08546865B2 Nonvolatile memory device having stacked semiconductor layers and common source line adjacent to bit line plug
有权
具有层叠半导体层和与位线插头相邻的公共源极线的非易失性存储器件
- 专利标题: Nonvolatile memory device having stacked semiconductor layers and common source line adjacent to bit line plug
- 专利标题(中): 具有层叠半导体层和与位线插头相邻的公共源极线的非易失性存储器件
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申请号: US13218715申请日: 2011-08-26
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公开(公告)号: US08546865B2公开(公告)日: 2013-10-01
- 发明人: Jong-Ho Lim , Choong-Ho Lee , Hye-Jin Cho
- 申请人: Jong-Ho Lim , Choong-Ho Lee , Hye-Jin Cho
- 申请人地址: KR Suwon-si
- 专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人地址: KR Suwon-si
- 代理机构: Stanzione & Kim, LLP
- 优先权: KR10-2008-0059759 20080624
- 主分类号: H01L29/788
- IPC分类号: H01L29/788 ; G11C11/34
摘要:
Provided is a nonvolatile memory device having a three dimensional structure. The nonvolatile memory device includes a plurality of stacked semiconductor layers and a plurality of memory cell transistors which is formed on each of a plurality of semiconductor layers and serially connected. Memory cell transistors disposed on different semiconductor layers are serially connected to include one cell string forming a current path in a plurality of semiconductor layers, a first selection transistor serially connected to one edge portion of the cell string and a second selection transistor serially connected to the other edge portion of the cell string.
公开/授权文献
- US20110310665A1 Nonvolatile Memory Device 公开/授权日:2011-12-22
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