Invention Grant
- Patent Title: Sampling
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Application No.: US13712522Application Date: 2012-12-12
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Publication No.: US08547160B2Publication Date: 2013-10-01
- Inventor: Ian Juso Dedic , Gavin Lambertus Allen
- Applicant: Fujitsu Semiconductor Limited
- Applicant Address: JP Yokohama
- Assignee: Fujitsu Semiconductor Limited
- Current Assignee: Fujitsu Semiconductor Limited
- Current Assignee Address: JP Yokohama
- Agency: Arent Fox LLP
- Priority: EP09250202 20090126
- Main IPC: H03K17/00
- IPC: H03K17/00

Abstract:
There is disclosed current-mode time-interleaved sampling circuitry configured to be driven by substantially sinusoidal clock signals. Such circuitry may be incorporated in ADC circuitry, for example as integrated circuitry on an IC chip. The disclosed circuitry is capable of calibrating itself without being taken off-line.
Public/Granted literature
- US20130147647A1 SAMPLING Public/Granted day:2013-06-13
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