发明授权
- 专利标题: Energy efficient power distribution for 3D integrated circuit stack
- 专利标题(中): 用于3D集成电路堆栈的节能配电
-
申请号: US13077359申请日: 2011-03-31
-
公开(公告)号: US08547769B2公开(公告)日: 2013-10-01
- 发明人: Ruchir Saraswat , Andre Schaefer , Supriyanto Supriyanto
- 申请人: Ruchir Saraswat , Andre Schaefer , Supriyanto Supriyanto
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Schwabe, Williamson & Wyatt, P.C.
- 主分类号: G11C5/14
- IPC分类号: G11C5/14
摘要:
Multiple dies can be stacked in what are commonly referred to as three-dimensional modules (or “stacks”) with interconnections between the dies, resulting in an IC module with increased circuit component capacity. Such structures can result in lower parasitics for charge transport to different components throughout the various different layers. In some embodiments, the present invention provides efficient power distribution approaches for supplying power to components in the different layers. For example, voltage levels for global supply rails may be increased to reduce required current densities for a given power objective.
公开/授权文献
信息查询