Invention Grant
- Patent Title: Apparatus and method for manufacturing semiconductor devices through layer material dimension analysis
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Application No.: US12457873Application Date: 2009-06-24
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Publication No.: US08551791B2Publication Date: 2013-10-08
- Inventor: Jang-Ik Park , Chung-Sam Jun , Hwan-Shik Park , Ji-Hye Kim , Kwan-Woo Ryu , Kong-Jung Sa , So-Yeon Yun
- Applicant: Jang-Ik Park , Chung-Sam Jun , Hwan-Shik Park , Ji-Hye Kim , Kwan-Woo Ryu , Kong-Jung Sa , So-Yeon Yun
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Lee & Morse, P.C.
- Priority: KR10-2008-0059983 20080625
- Main IPC: H01L21/00
- IPC: H01L21/00 ; G06K9/00 ; G01N21/00

Abstract:
Apparatus and method for manufacturing a semiconductor device through a layer material dimension analysis increase productivity. The method includes performing a semiconductor manufacturing process of at least one reference substrate and at least one target substrate in a semiconductor process device, detecting a reference spectrum and a reference profile for the reference substrate, determining a relation function between the detected reference spectrum and reference profile, detecting a real-time spectrum of the target substrate, and determining in real time a real-time profile of the target substrate processed in the semiconductor process device by using the detected real-time spectrum as a variable in the determined relation function.
Public/Granted literature
- US20090325326A1 Apparatus and method for manufacturing semiconductor devices through layer material dimension analysis Public/Granted day:2009-12-31
Information query
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