发明授权
- 专利标题： Method of producing precision vertical and horizontal layers in a vertical semiconductor structure
- 专利标题（中）： 在垂直半导体结构中生产精密垂直和水平层的方法
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申请号： US13458310申请日： 2012-04-27
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公开(公告)号： US08551834B2公开(公告)日： 2013-10-08
- 发明人: Jonas Ohlsson , Lars Samuelson , Erik Lind , Lars-Erik Wernersson , Truls Lowgren
- 申请人： Jonas Ohlsson , Lars Samuelson , Erik Lind , Lars-Erik Wernersson , Truls Lowgren
- 申请人地址： SE Lund
- 专利权人： QuNano AB
- 当前专利权人： QuNano AB
- 当前专利权人地址： SE Lund
- 代理机构： The Marbury Law Group PLLC
- 优先权： SE0601997 20060918; SE0701885 20070817
- 主分类号： H01L21/76
- IPC分类号： H01L21/76
摘要：
The present invention relates to providing layers of different thickness on vertical and horizontal surfaces (15, 20) of a vertical semiconductor device (1). In particular the invention relates to gate electrodes and the formation of precision layers (28) in semiconductor structures comprising a substrate (10) and an elongated structure (5) essentially standing up from the substrate. According to the method of the invention the vertical geometry of the device (1) is utilized in combination with either anisotropic desposition or anisotropic removal of deposited material to form vertical or horizontal layers of very high precision.
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