Invention Grant
- Patent Title: Device-manufacturing scheme for increasing the density of metal patterns in inter-layer dielectrics
- Patent Title (中): 用于增加层间电介质中金属图案密度的器件制造方案
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Application No.: US13149547Application Date: 2011-05-31
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Publication No.: US08569129B2Publication Date: 2013-10-29
- Inventor: Wei Yu Ma , Fang-Tsun Chu , Kvei-Feng Yen , Yao-Bin Wang
- Applicant: Wei Yu Ma , Fang-Tsun Chu , Kvei-Feng Yen , Yao-Bin Wang
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L21/8234
- IPC: H01L21/8234 ; H01L21/336 ; H01L21/8238 ; H01L21/20 ; H01L21/3205

Abstract:
A method includes forming a transistor at a surface of a semiconductor substrate, wherein the step of forming the transistor comprises forming a gate electrode, and forming a source/drain region adjacent the gate electrode. First metal features are formed to include at least portions at a same level as the gate electrode. Second metal features are formed simultaneously, and are over and contacting the first metal features. A first one of the second metal features is removed and replaced with a third metal feature, wherein a second one of the second metal features is not removed. A fourth metal feature is formed directly over and contacting the gate electrode, wherein the third and the fourth metal features are formed using a same metal-filling process.
Public/Granted literature
- US20120306023A1 Device-Manufacturing Scheme for Increasing the Density of Metal Patterns in Inter-Layer Dielectrics Public/Granted day:2012-12-06
Information query
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