公开(公告)号：US08569129B2

公开(公告)日：2013-10-29

申请号：US13149547

申请日：2011-05-31

Applicant: Wei Yu Ma ,  Fang-Tsun Chu ,  Kvei-Feng Yen ,  Yao-Bin Wang

Inventor： Wei Yu Ma ,  Fang-Tsun Chu ,  Kvei-Feng Yen ,  Yao-Bin Wang

IPC: H01L21/8234 ,  H01L21/336 ,  H01L21/8238 ,  H01L21/20 ,  H01L21/3205

CPC classification number: H01L23/5226 ,  H01L21/76816 ,  H01L21/7684 ,  H01L21/76879 ,  H01L23/528 ,  H01L27/0629 ,  H01L29/0619 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method includes forming a transistor at a surface of a semiconductor substrate, wherein the step of forming the transistor comprises forming a gate electrode, and forming a source/drain region adjacent the gate electrode. First metal features are formed to include at least portions at a same level as the gate electrode. Second metal features are formed simultaneously, and are over and contacting the first metal features. A first one of the second metal features is removed and replaced with a third metal feature, wherein a second one of the second metal features is not removed. A fourth metal feature is formed directly over and contacting the gate electrode, wherein the third and the fourth metal features are formed using a same metal-filling process.

Abstract translation: 一种方法包括在半导体衬底的表面形成晶体管，其中形成晶体管的步骤包括形成栅电极，以及形成与栅电极相邻的源/漏区。 第一金属特征形成为至少包括与栅电极相同水平的部分。 第二金属特征同时形成，并且与第一金属特征结合并接触。 第二金属特征中的第一个被去除并被第三金属特征替换，其中第二金属特征的第二个不被去除。 直接在栅极上方形成第四金属特征，其中第三和第四金属特征使用相同的金属填充工艺形成。

公开(公告)号：US20120306023A1

公开(公告)日：2012-12-06

申请号：US13149547

申请日：2011-05-31

Applicant: Wei Yu Ma ,  Fang-Tsun Chu ,  Kvei-Feng Yen ,  Yao-Bin Wang

Inventor： Wei Yu Ma ,  Fang-Tsun Chu ,  Kvei-Feng Yen ,  Yao-Bin Wang

IPC: H01L27/06 ,  H01L21/8234

CPC classification number: H01L23/5226 ,  H01L21/76816 ,  H01L21/7684 ,  H01L21/76879 ,  H01L23/528 ,  H01L27/0629 ,  H01L29/0619 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method includes forming a transistor at a surface of a semiconductor substrate, wherein the step of forming the transistor comprises forming a gate electrode, and forming a source/drain region adjacent the gate electrode. First metal features are formed to include at least portions at a same level as the gate electrode. Second metal features are formed simultaneously, and are over and contacting the first metal features. A first one of the second metal features is removed and replaced with a third metal feature, wherein a second one of the second metal features is not removed. A fourth metal feature is formed directly over and contacting the gate electrode, wherein the third and the fourth metal features are formed using a same metal-filling process.

Abstract translation: 一种方法包括在半导体衬底的表面形成晶体管，其中形成晶体管的步骤包括形成栅电极，以及形成与栅电极相邻的源/漏区。 第一金属特征形成为至少包括与栅电极相同水平的部分。 第二金属特征同时形成，并且与第一金属特征结合并接触。 第二金属特征中的第一个被去除并被第三金属特征替换，其中第二金属特征的第二个不被去除。 直接在栅极上方形成第四金属特征，其中第三和第四金属特征使用相同的金属填充工艺形成。